
IBM3206K0424
Preliminary
IBM Processor for Network Resources
pnr25.chapt05.01
August 14, 2000
The PHY Interface (LINKC)
Page 415 of 676
9
16 bit parity
When this bit is set to 
’
1
’
 and it is in 16-bit mode, that parity will be calculated across all 
16 bits and check against FYRPAR(1). When in eight-bit mode with bit 9 set to 
’
0
’
, the 
parity will be compared against FYRPAR(1). This bit has no affect if receive device is 
POS-PHY. The default setting of this bit is 
’
1
’
.
8
Reserved
Reserved
7-0
These bits only have meaning if a PMC PM5346 SUNI LITE/UTOPIA (bits 15-13 = "011") is selected. If any other device is 
chosen, these bits are ignored. Bits two through zero are used to make adjustments to the Utopia interface for compatibility 
with the Suni-PHD PHY.
7
52 Byte Cell
When set, the cell received from the PHY is 52 bytes. No HEC byte is received.
6-4
Reserved
Reserved
6
Unassigned/Idle Cell Reception
When set to 
’
1
’
, this bit will enable unassigned/idle cell reception. This should be set to 
’
0
’
 when using the internal SONET Framer.
5
Disable Limited HEC Checking on 
Received Idle/Unassigned Cells
If bit 5 is set to 
’
1
’
, the receive logic will ignore the HEC byte of the header of idle and 
unassigned cells. Idle is defined as a header of X'00000001' and unassigned is defined 
as a header of X'0000000n' where n is 'xxx0'. 
If bit 6 is set to enable unassigned/idle cell reception, all cells are passed to REASM 
regardless of how this bit is set. If bit 6 is set to disable unassigned/idle cell reception 
and this bit is set to 
’
0
’
, the HEC byte of cells with an apparent idle header will be com-
pletely checked before deciding whether or not to pass the cell to REASM. If a cell 
appears to have an unassigned header, HEC bits seven, six, and zero will be checked 
because they are a constant regardless of the value of bits 3-1 of the header. If other 
HEC bits are bad, REASM will detect the HEC error and discard the cell. If there is a 
correctable HEC error and the cell is indeed unassigned, an out of range error will 
occur in REASM.
4
Ignore GFC in Null/Idle Cell Deter-
mination
Bit 4, when set, causes the receive logic to ignore the first four bits of the ATM header 
in determining whether a cell being received is a null or idle cell. 
3
Enable XON/XOFF
Bit 3, when set, allows the XON/XOFF bit of the header of a received cell to sus-
pend/continue transmission from the IBM3206K0424's transmit logic for all ports asso-
ciated with Config 2.
2
Drive RENB Inactive When Not 
Receiving
When set to 
’
1
’
, this bit forces the receive logic to deactivate RENB when in the idle 
state.
1
Gate RSOC with RCA
When set to 
’
1
’
, this bit forces the receive logic to see both RSOC and RCA before 
considering RSOC valid.
0
Receive Extra Header Byte
When set to 
’
1
’
, this bit allows an extra header byte to be accepted at the start of a cell 
by the receive logic. The extra byte is discarded.
Bit(s)
Name
Description