SCC Application Notes
AMD
7–37
unsigned int lsb, temp, msb, latch, wrdh, wrdl, tmp1, start;
unsigned int bytn, byt, tmp2;
outportb(0x09, 0x01); /*clear all DMA requests on channel 1*/
outportb(0x0A, 0x05); /*mask channel 1 DMA request*/
outportb(0x0B, 0x49); /*mode register for single transfer mode,
read, auto init, address increment*/
lsb = adrr & 0xFF;
temp = adrr >> 0x08;
/*rotate ptr 8 bits to get msb*/
msb = temp & 0xFF;
temp = temp >> 0x08;
/*rotate 8 bits to get sector address*/
latch = temp & 0x0F;
outportb(0x81, latch);/*load sector address into DMA page reg-
ister*/
outportb(0x02, lsb);
/*lower byte of starting address*/
outportb90x0B, msb);
/*upper byte of starting address*/
start = adrr & 0xFFFF;
bytn = 0x03:
/*address and 2 bytes for length are
transmit*/
wrdl = bytn & 0xFF
/*lower order byte of wordcount*/
tmp1 = bytn >> 0x08;
/*rotate wordcount 8 bits for msb*/
wrdh = tmp1 & 0xFF:
/*upper byte of wordcount*/
outportb(0x03, wrd1); /*this is the lower byte of # of bytes
that fit within the first sector*/
outportb(0x03, wrdh); /*upper byte of wordcount*/
outportb(0x0A, 0x01); /*enable DMA*/
outportb(port, 0x00);
outportb(port, 0xC0); /*reset transmit underrun latch*/
}
/*THIS ROUTINE INITIALIZES THE 9517 DMA CONTROLLER TO TRANSMIT
ENTIRE/
dminit()
{
unsigned int lsb, temp, msb, latch, wrdh, wrd1, tmp1, start;
unsigned int bytn, byt, tmp2;
outportb(0x09, 0x01); /*clear all DMA requests on channel 1*/
outportb(0x0A, 0x05); /*mask channel 1 DMA request*/
outportb(0x0B, 0x49); /*mode register for single transfer mode,
read, auto init, address increment*/
lsb = adrr & 0xFF;
temp = adrr >> 0x08;
/*rotate ptr 8 bits to get msb*/
latch = temp & 0x0F;
outportb(0x81, latch);/*load sector address into dma page reg-
ister*/
outportb(0x02, lsb);
/*lower byte of starting address*/
outportb(0x02, msb);
/*upper byte of starting address*/
start = adrr & 0xFFFF;
bytn = num;
wrd1 = bytn & 0xFF;
/*lower order byte of wordcount*/
tmp1 = bytn >> 0x08;
/*rotate wordcount 8 bits for msb*/
wrdh = tmp1 & 0xFF;
/*upper byte of wordcount*/
outportb(0x03, wrd1); /*this is the lower byte of # that fit
within the first sector*/
outportb(0x03, wrdh); /*upper byte of wordcount*/
outportb(0x04, 0x01); /*enable DMA*/
outportb(port, 0x00);
outportb(port, 0xC0); /*reset transmit underrun latch*/
}
cont()
/*arbitrary time delay routine*/