參數(shù)資料
型號: AD9910BSVZ
廠商: Analog Devices Inc
文件頁數(shù): 58/64頁
文件大小: 0K
描述: IC DDS 1GSPS 14BIT PAR 100TQFP
產(chǎn)品培訓(xùn)模塊: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設(shè)計資源: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
標(biāo)準(zhǔn)包裝: 1
分辨率(位): 14 b
主 fclk: 1GHz
調(diào)節(jié)字寬(位): 32 b
電源電壓: 1.8V, 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
產(chǎn)品目錄頁面: 552 (CN2011-ZH PDF)
Data Sheet
AD9910
Rev. D | Page 61 of 64
Profile Registers
There are eight consecutive serial I/O addresses (Address 0x0E
to Address 0x015) dedicated to device profiles. All eight profile
registers are either single tone profiles or RAM profiles. RAM
profiles are in effect when CFR1[31] = 1. Single tone profiles are
in effect when CFR1[31] = 0, CFR2[19] = 0, and CFR2[4] = 0.
In normal operation, the active profile register is selected using
the external PROFILE[2:0] pins. However, in the specific case
when CFR1[31] = 1 and CFR1[20:17] ≠ 0000b, the active profile
is selected automatically (see the RAM Ramp-Up Internal
Profile 0 to Profile 7, Single Tone Registers—Address 0x0E to Address 0x15
Eight bytes are assigned to each register.
Table 30. Bit Descriptions for Profile 0 to Profile 7 Single Tone Register
Bit(s)
Mnemonic
Description
63:62
Open
61:48
Amplitude scale factor
This 14-bit number controls the DDS output amplitude.
47:32
Phase offset word
This 16-bit number controls the DDS phase offset.
31:0
Frequency tuning word
This 32-bit number controls the DDS frequency.
RAM Profile 0 to RAM Profile 7, Control Registers—Address 0x0E to Address 0x15
Eight bytes are assigned to each register.
Table 31. Bit Descriptions for Profile 0 to Profile 7 RAM Register
Bit(s)
Mnemonic
Description
63:56
Open
55:40
Address step rate
16-bit address step rate value.
39:30
Waveform end address
10-bit waveform end address.
29:24
Open
23:14
Waveform start address
10-bit waveform start address.
13:6
Open
5
No-dwell high
Effective only when the RAM mode is in ramp-up.
0 = when the RAM state machine reaches the end address, it halts.
1 = when the RAM state machines reaches the end address, it jumps to the start address
and halts.
4
Open
3
Zero-crossing
Effective only when in RAM mode, direct switch.
0 = zero-crossing function disabled.
1 = zero-crossing function enabled.
2:0
RAM mode control
See Table 13 for details.
RAM Register—Address 0x16
Four bytes are assigned to the RAM register.
Table 32. Bit Descriptions for RAM Register
Bit(s)
Mnemonic
Description
31:0
RAM word
The start and end addresses in the RAM Profile 0 to RAM Profile 7 control registers define
the number of 32-bit words (1 minimum, 1024 maximum) to be written to the RAM register.
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