參數(shù)資料
型號: ZR38650
廠商: Electronic Theatre Controls, Inc.
英文描述: PROGRAMMABLE DIGITAL AUDIO PROCESSOR
中文描述: 可編程數(shù)字音頻處理器
文件頁數(shù): 59/66頁
文件大?。?/td> 441K
代理商: ZR38650
59
ZR38650
Reset Timing
Parameter
Min
Max
Units
Notes
59
RESET duration, warm reset
16 t
XTI
127 t
XTI
ns
60
RESET duration, cold reset
200 t
XTI
ns
[1]
61
Memory bus enable after RESET rising edge, warm reset
t
XTI
+10
2 t
XTI
+15
ns
62
Memory bus disable after RESET falling edge
t
XTI
+10
2 t
XTI
+15
ns
1. Applies to the power-up sequence. The rising edge of RESET must occur after the crystal oscillator or external clock frequency and amplitude have stabilized. After
the rising edge of a cold RESET, 4096 clock cycles are required for initialization of the internal phase locked loop, during which the processor is inactive. Any sub-
sequent reset pulse of 128 clocks or longer is interpreted as a cold reset and will start a new initialization of the phase locked loop.
Figure 34. Warm/Cold Reset
62
XTI
59, 60
RESET
CS
61
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