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| 型號： | STPC12HEYC |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | X86 Core PC Compatible System-on-Chip for Terminals |
| 中文描述： | x86內(nèi)核PC兼容系統(tǒng)上的終端芯片 |
| 文件頁數(shù)： | 57/111頁 |
| 文件大?。?/td> | 1896K |
| 代理商： | STPC12HEYC |
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ELECTRICAL SPECIFICATIONS
Issue 1.0 - July 24, 2002
57/111
41
SA[19:0] SBHE valid to IOCHRDY negated
41a
Memory access to 16-bit ISA Slave
41b
Memory access to 8-bit ISA Slave
41c
I/O access to 16-bit ISA Slave
41d
I/O access to 8-bit ISA Slave
SA[19:0] SBHE valid to read data valid
42b
Memory access to 16-bit ISA Slave Standard cycle
42e
Memory access to 8-bit ISA Slave Standard cycle
42h
I/O access to 16-bit ISA Slave Standard cycle
42l
I/O access to 8-bit ISA Slave Standard cycle
MEMR#, MEMW#, SMEMR#, SMEMW#, IOR#, IOW# asserted to IOCHRDY negated
47a
Memory access to 16-bit ISA Slave
47b
Memory access to 8-bit ISA Slave
47c
I/O access to 16-bit ISA Slave
47d
I/O access to 8-bit ISA Slave
MEMR#, SMEMR#, IOR# asserted to read data valid
48b
Memory access to 16-bit ISA Slave Standard Cycle
48e
Memory access to 8-bit ISA Slave Standard Cycle
48h
I/O access to 16-bit ISA Slave Standard Cycle
48l
I/O access to 8-bit ISA Slave Standard Cycle
IOCHRDY asserted to read data valid
54a
Memory access to 16-bit ISA Slave
54b
Memory access to 8-bit ISA Slave
54c
I/O access to 16-bit ISA Slave
54d
I/O access to 8-bit ISA Slave
IOCHRDY asserted to MEMR#, MEMW#, SMEMR#, SMEMW#,
IOR#, IOW# negated
IOCHRY asserted to MEMR#, SMEMR# negated (refresh)
IOCHRDY asserted to next ALE# asserted
IOCHRDY asserted to SA[19:0], SBHE invalid
MEMR#, IOR#, SMEMR# negated to read data invalid
MEMR#, IOR#, SMEMR# negated to data bus float
Write data before MEMW# asserted
61a
Memory access to 16-bit ISA Slave
Memory access to 8-bit ISA Slave (Byte copy at end of
start)
Write data before SMEMW# asserted
61c
Memory access to 16-bit ISA Slave
61d
Memory access to 8-bit ISA Slave
Write Data valid before IOW# asserted
61e
I/O access to 16-bit ISA Slave
61f
I/O access to 8-bit ISA Slave
MEMW# negated to write data invalid - 16-bit
MEMW# negated to write data invalid - 8-bit
SMEMW# negated to write data invalid - 16-bit
SMEMW# negated to write data invalid - 8-bit
Note: The signal numbering refers to
Table 4-8
6T
12T
6T
12T
Cycles
Cycles
Cycles
Cycles
42
4T
10T
4T
10T
Cycles
Cycles
Cycles
Cycles
47
2T
5T
2T
5T
Cycles
Cycles
Cycles
Cycles
48
2T
5T
2T
5T
Cycles
Cycles
Cycles
Cycles
54
1T(R)/2T(W)
1T(R)/2T(W)
1T(R)/2T(W)
1T(R)/2T(W)
Cycles
Cycles
Cycles
Cycles
55a
1T
Cycles
55b
56
57
58
59
61
1T
2T
2T
0T
0T
Cycles
Cycles
Cycles
Cycles
Cycles
2T
Cycles
61b
2T
Cycles
61
2T
2T
Cycles
Cycles
61
2T
2T
1T
1T
1T
1T
Cycles
Cycles
Cycles
Cycles
Cycles
Cycles
64a
64b
64c
64d
Table 4-14. ISA Bus AC Timing
Name
Parameter
Min
Max
Units
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| STPCATLAS | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HDYC | X86 Core PC Compatible System-on-Chip for Terminals |
| STPC12HDYI | X86 Core PC Compatible System-on-Chip for Terminals |
| STPCD0166BTA3 | PC Compatible Embedded Microprocessor |
| STPCD0166BTC3 | PC Compatible Embedded Microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPC12HEYI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPC1MBBL | 制造商:Panduit Corp 功能描述: |
| STPC1MBGR | 制造商:Panduit Corp 功能描述:Cable Assembly STP 1m 26AWG Modular Plug to Modular Plug PL-PL |
| STPC3MBBL | 制造商:Panduit Corp 功能描述: |
| STPC3MBGR | 制造商:Panduit Corp 功能描述:Cable Assembly STP 3m 26AWG Modular Plug to Modular Plug PL-PL |
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