參數(shù)資料
型號： MC916X1CTH16B1
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PQFP120
封裝： QFP-120
文件頁數(shù)： 32/172頁
文件大?。?/td> 1200K
代理商： MC916X1CTH16B1
MC68HC916X1
MOTOROLA
MC68HC916X1TS/D
127
The base address high registers (FEE1BAH, FEE2BAH) contain the 8 high-order bits of the array
base address; the base address low registers (FEE1BAL, FEE2BAL) contain the active low-order
bits of the array base address. During reset, both FEExBAH and FEExBAL take on default values
programmed into associated shadow registers. After reset, if LOCK = 0 and STOP = 1, software
can write to FEExBAH and FEExBAL to relocate the array.
The flash EEPROM control registers (FEE1CTL, FEE2CTL) control programming and erasure of
the arrays. FEExCTL is accessible in supervisor mode only.
VFPE — Verify Program/Erase
0 = Normal read cycles
1 = Invoke program verify circuit
The VFPE bit invokes a special program-verify circuit. During programming sequences (ERAS = 0),
VFPE is used in conjunction with the LAT bit to determine when programming of a location is complete.
If VFPE and LAT are both set, a bit-wise exclusive-OR of the latched data with the data in the location
being programmed occurs when any valid FLASH location is read. If the location is completely pro-
grammed, a value of zero is read. Any other value indicates that the location is not fully programmed.
When VFPE is cleared, normal reads of valid FLASH locations occur. The value of VFPE cannot be
changed while ENPE = 1.
ERAS — Erase Control
0 = Flash EEPROM configured for programming
1 = Flash EEPROM configured for erasure
The ERAS bit configures the array for either programming or erasure. Setting ERAS causes all locations
in the array and all control bits in the control block to be configured for erasure at the same time.
When the LAT bit is set, ERAS also determines whether a read returns the data in the addressed loca-
tion (ERAS = 1) or the address itself (ERAS = 0). ERAS cannot be changed while ENPE = 1.
FEE1BAH, FEE2BAH — Flash EEPROM Base Address High Registers
$YFF804, $YFF824
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
00000000
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
RESET:
0
SB
FEE1BAL — Flash EEPROM Base Address Low Register
$YFF806
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
15
ADDR
14
00000000000000
RESET:
SB
0
FEE2BAL — Flash EEPROM Base Address Low Register
$YFF826
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0000000000000000
RESET:
SB
0
FEE1CTL, FEE2CTL — Flash EEPROM Control Register
$YFF808, $YFF828
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
VFPE ERAS LAT ENPE
RESET:
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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