參數(shù)資料
型號(hào): MC68HC05L25PB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP52
封裝: TQFP-52
文件頁數(shù): 20/152頁
文件大?。?/td> 897K
代理商: MC68HC05L25PB
Analog Subsystem
MC68HC05L25 Data Sheet, Rev. 3.1
116
Freescale Semiconductor
read as a logic 0. If the DDR = 1, the port A data register will read the output latch value. The remaining
port A pins will read normally. To digitally read a multiplexed port A pin as an input port, the A/D
subsystem must be disabled (ADON = 0) or input channels 2–7 must be selected.
12.9 A/D Conversion Data Register
This register contains the output of the A/D converter.
Table 12-1. A/D Multiplexer Input
Channel Assignments
Channel
Signal
0
AD0 Port A Bit 4
1
AD1 Port A Bit 5
2
Reserved
3
Reserved
4
VREFH = VDD
5
(VREFH + VREFL)/2
6
VREFL = VSS
7Factory Test
Address:
$001D
Bit 7
654321
Bit 0
Read:
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Write:
Reset:
Unaffected by Reset
= Unimplemented
Figure 12-2. A/D Conversion Value Data Register (ADDR)
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