參數(shù)資料
型號: MC68HC05L25PB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP52
封裝: TQFP-52
文件頁數(shù): 141/152頁
文件大?。?/td> 897K
代理商: MC68HC05L25PB
Time Base Control Register 2
MC68HC05L25 Data Sheet, Rev. 3.1
Freescale Semiconductor
89
9.4 Time Base Control Register 2
TBIF — Time Base Interrupt Flag
The TBIF bit is set every timeout interval of the time base interrupt. This is a read-only bit and is cleared
by writing a one to the RTBIF bit. Reset clears the TBIF bit. The time base interrupt period between
reset and first TBIF depends on the time elapsed during reset, since the time base divider is not
initialized on reset.
TBIE — Time Base Interrupt Enable
The TBIE bit enables the time base interrupt capability. If TBIF = 1 and TBIE = 1, the time base interrupt
is generated.
1 = TB interrupt requested when TBIF = 1
0 = TB interrupt disabled
TBR1–TBR0 — Time Base Interrupt Rate Select
The TBR1 and TBR0 bits select one of four rates for the time base interrupt period. The TBI rate is also
related to the COP timeout reset period. See Table 9-2 and Table 9-3. These bits are set to a logical
1 on reset.
RTBIF — Reset Time Base Interrupt Flag
The RTBIF bit is a write-only bit and always reads as zero. Writing a one to this bit clears the TBIF bit
and writing zero to this bit has no effect.
1 = Reset TBIF
0 = No effect
Bit 2 — Reserved
This bit is not used and always reads as zero.
COPE — COP Enable
When the COPE bit is one, the COP reset function is enabled. This bit is cleared on reset (including
COP timeout reset) and a write to this bit is allowed only once after reset.
1 = COP enabled
0 = COP disabled
COPC — COP Clear
Writing a logical 1 to COPC bit clears the 2-bit divider to prevent COP timeout. (The COP timeout
period depends on the TBI rate.) This is a write-only bit and returns to zero when read.
1 = Clear COP timeout divider
0 = No effect
Address:
$0011
Bit 7
654321
Bit 0
Read:
TBIF
TBIE
TBR1
TBR0
00
COPE
0
Write:
RTBIF
COPC
Reset:
00000000
= Unimplemented
Figure 9-6. Time Base Control Register 2 (TBCR2)
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