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參數(shù)資料
| 型號： | MC68HC05G1B |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| 封裝： | SDIP-56 |
| 文件頁數(shù)： | 72/124頁 |
| 文件大小： | 732K |
| 代理商： | MC68HC05G1B |
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MC68HC05G1
MOTOROLA
6-5
CLOCKS
6
6.2.3
RTC Status Register
There are three interrupts associated with the RTC, their ags are in the RTC Status register
($1C), and their respective enable bits are the RTC Control register ($1D).
RTCF
1 (set)
–
Indicates once a day interrupt has occurred. After serving this
interrupt, it is the user’s responsibility to clear this bit, otherwise the
CPU will keep on serving this once a day interrupt when a new RTC
interrupt occurs (even there is no once a day interrupt occurs).
0 (clear) –
Indicates once a day interrupt has not occurred.
ALF
1 (set)
–
Indicates alarm interrupt has occurred. After serving this interrupt, it
is the user’s responsibility to clear this bit, otherwise the CPU will
keep on serving this alarm interrupt when a new RTC interrupt
occurs (even there is no alarm interrupt occurs).
0 (clear) –
Indicates alarm interrupt has not occurred.
SECF
1 (set)
–
Indicates once a second interrupt has occurred. After serving this
interrupt, it is responsibility to clear this bit, otherwise the CPU will
keep on serving this once a second interrupt when a new RTC
interrupt occurs (even there is no once a second interrupt occurs).
0 (clear) –
Indicates once a second interrupt has not occurred.
6.2.4
RTC Control Register
RTCE
1 (set)
–
Real time clock once a day interrupt enable
0 (clear) –
Real time clock once a day interrupt disable
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on Reset
$1C
SECF
ALF
RTCF
---- -000
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on Reset
$1D
SECE
ALE
RTCE
---- -000
TPG
47
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