參數(shù)資料
型號: MC68HC05G1B
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝: SDIP-56
文件頁數(shù): 11/124頁
文件大小: 732K
代理商: MC68HC05G1B
MOTOROLA
12-4
MC68HC05G1
OPERATING MODES
12
12.3
Bootstrap Mode
The bootstrap mode is provided in the EPROM part (MC68HC705G1) as a mean of
self-programming its EPROM with minimal circuitry. It is entered on the rising edge of RESET if
IRQ pin is at 1.8VDD and PB1 is at logic one. RESET must be held low for 4064 cycles after POR
(power-on reset) or for a time tRL for any other reset. Table 12-3 shows the options that are
available once bootstrap mode is entered. The execution result is indicated by LED1 and LED2.
The EPROM programming circuit for bootstrap mode is shown in Figure 12-4.
Table 12-2 Self-Check Report
PA3
PA2
PA1
PA0
REMARKS
1
Faulty part, port A bad
1
0
Bad I/O
1
0
1
Bad RAM
1
0
Bad ROM
1
0
1
Bad TIMER
1
0
1
0
Bad A/D
1
0
1
Bad SPI
1
0
Bad RTC
0
1
Bad Interrupts
Flashing
Good Device
All Others
Bad Device, Bad Port A, etc.
1=LED off; 0=LED on.
Table 12-3 Bootstrap Mode Options
PD3
PD2
PD1
PD0
LED1
LED2
REMARKS
0
1
Off
Verify
0
1
Program
Verify
Program & Verify
0
1
0
1
Off
Verify
Blank EPROM check
TPG
104
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