參數(shù)資料
型號(hào): MC68HC05G1B
廠商: MOTOROLA INC
元件分類(lèi): 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝: SDIP-56
文件頁(yè)數(shù): 39/124頁(yè)
文件大?。?/td> 732K
代理商: MC68HC05G1B
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MC68HC05G1
MOTOROLA
2-1
PIN DESCRIPTIONS
2
PIN DESCRIPTIONS
This section provides a description of the functional pins and I/O programming of the
MC68HC05G1 microcontroller.
2.1
Functional Pin Descriptions
PIN NAME
56-pin SDIP
PIN No.
64-pin QFP
PIN No.
DESCRIPTION
VDD, VSS
39, 29
37, 25
Power is supplied to the MCU using these two pins.VDD is power and
VSS is ground.
IRQ
35
32
IRQ is software programmable to provide two choices of interrupt
triggering sensitivity. These options are:
1) negative edge-sensitive triggering only, or
2) both negative edge-sensitive and level sensitive triggering.
INT1, INT2
34, 32
31, 29
INT1 & INT2 are general purpose external interrupt input pins. They
are accompanied with their individual enable, ag, and status bits.
They are software programmable to provide two choices of interrupt
triggering sensitivity. These options are:
1) negative edge-sensitive triggering only, or
2) both negative edge-sensitive and level sensitive triggering.
RESET
36
34
The active low RESET input is not required for start-up, but can be
used to reset the MCU internal state and provide an orderly software
start-up procedure.
TCAP
16
11
The TCAP input controls the input capture feature for the on-chip
programmable timer.
TCMP
15
10
The TCMP pin provides an output for the output compare feature of
the on-chip programmable timer.
OSC1, OSC2
37, 38
35, 36
These pins provide connections to the on-chip oscillator. The crystal
frequency is 32.768KHz. OSC1 may be driven by an external
oscillator if an external crystal circuit is not used.
PA0-PA7
47-54
45, 46, 48-52, 54
These eight I/O lines comprise port A. The state of any pin is software
programmable. All port A lines are congured as input during
power-on or external reset.
TPG
19
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