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參數(shù)資料
| 型號： | MC68HC05G1B |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| 封裝： | SDIP-56 |
| 文件頁數(shù)： | 40/124頁 |
| 文件大?。?/td> | 732K |
| 代理商： | MC68HC05G1B |
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MOTOROLA
2-2
MC68HC05G1
PIN DESCRIPTIONS
2
PB0-PB7
17-24
12-19
These eight I/O lines comprise port B. The state of any pin is software
programmable. All port B lines are congured as input during
power-on or external reset.
PC0-PC7
55, 56, 1-6
55-60, 62, 63
These eight I/O lines comprise port C. The state of any pin is software
programmable. All port C lines are congured as input during power
on or external reset.
PD0-PD7
14-7
9-5, 3, 2, 64
These eight I/O lines comprise port D. The state of any pin is software
programmable. All port D lines are congured as input during power
on or external reset.
PE0-PE7
Not bonded out
in the 56-pin
package
47, 53, 61, 1,
5, 21, 26, 33
These eight I/O lines comprise port E. The state of any pin is software
programmable. All port E lines are congured as input during power
on or external reset.
Port E is only available for the 64-pin QFP package; to avoid leakage
current, these eight lines should be programmed to output modes for
the 56-pin package.
PF0/MISO
PF1/MOSI
PF2/SCK
PF3/SS
25
26
27
28
20
22
23
24
These four lines comprise of the xed input port F. It is the default
setting at power-on or reset.
PF0-PF3 becomes MISO, MOSI, SCK, & SS respectively when the
Serial Peripheral Interface is activated by setting SPE of the Serial
Peripheral Control register (bit 6 of address $2A).
PG0/AN0
PG1/AN1
PG2/AN2
PG3/AN3
42
43
44
45
40
41
42
43
These four lines comprise of the xed input port G. It is the default
setting at power-on or reset.
If the ADON bit of the A/D Control & Status register (bit 5 of address
$29) is set, PG0-PG3 become AN0-AN3, analog inputs for the on-chip
A/D converter.
VRH, VRL
40, 41
38, 39
The VRH input pin is the high reference voltage for the A/D converter.
The VRL input pin is the low reference voltage for the A/D converter.
NC/
VPP
46
44
This pin is used as the programming voltage pin for the EPROM
version,
MC68HC705G1. It is connected to VDD for normal operation.
This pin is not used in the standard ROM part, MC68HC05G1.
RF, VCOIN, PCOUT
30, 33, 31
27, 30, 28
These pins provide connection to the on-chip phase lock loop (PLL)
oscillator.
PIN NAME
56-pin SDIP
PIN No.
64-pin QFP
PIN No.
DESCRIPTION
TPG
20
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| MC68HC705JB2P | 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP20 |
| MC68HC705JB4P | 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP28 |
| MC68HC705K1CDW | 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO16 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05J1 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05J1A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ACP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05J1ADW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
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