參數(shù)資料
型號: MC68HC05G1B
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝: SDIP-56
文件頁數(shù): 65/124頁
文件大?。?/td> 732K
代理商: MC68HC05G1B
MC68HC05G1
MOTOROLA
5-11
INTERRUPTS
5
Figure 5-4 External Interrupt Circuit and Timing
+
&
+
EXTERNAL
REQUEST
INTERRUPT
POWER-ON RESET
EXTERNAL RESET
EXTERNAL INTERRUPT
BEING SERVICED (IRQ ONLY)
D
C
R
Q
VDD
IRQ, INT1, INT2
LEVEL SENSITIVE TRIGGER
IRQ, INT1, INT2
I BIT (CC)
IRQ, INT1, INT2
tILIH
tILIL
EDGE SENSITIVE TRIGGER
CONDITION
The minimum pulse width tILIH is either
125ns (VDD=5V) or 250ns (VDD=3V).
The period tILIL should not be less than
the number of tcyc cycles it takes to ex-
ecute the interrupt service routine plus
21 tcyc cycles.
INTERRUPT PIN
tILIL
Wired ORed
Interrupt signals
IRQ, INT1, INT2
if after servicing an interrupt the
external interrupt pins remain low, then
the next interrupt is recognized.
Normally
used
with
wired
OR
connection.
(b) Interrupt Mode Diagram
(a) Interrupt Function Diagram
LEVEL SENSITIVE TRIGGER
CONDITION
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