2.11 Watchdog Timer, Timebase Timer Functions
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Chapter 2: Hardware
2.11.4 Operating Description
(1) Watchdog Timer
The watchdog timer function is used to detect program loops. If a program loop condition causes the
designated time to elapse before ‘0’ is written to the WTE bit in the watchdog timer, the watchdog
timer will generate a watchdog reset request.
s Startup
When the watchdog timer is stopped, it can be started by writing ‘0’ to the WTE bit in the WDTC
register. At this moment, the value of the WT0, WT1 bits is used to determine the watchdog timer reset
interval. The interval can only be defined by the data values effective at the time of startup.
s Watchdog Timer Reset Prevention
Once the watchdog timer has been started, the program must clear the 2-bit watchdog counter at regular
intervals. Specifically, this means that ‘0’ must be written to the WTE bit in the WDTC register at
regular intervals. The watchdog counter is configured as a 2-bit counter and uses the carry signal of the
timebase counter as its clock source. Thus when the timebase timer is cleared, the watchdog reset
generation time may be longer than the setting.
Figure 2.11.2 shows the operation of the watchdog timer.
Fig. 2.11.2 Watchdog Timer Operation
s Watchdog Function Stoppage
The watchdog timer is initialized and placed in stop state after startup by power-on reset, hardware
standby or watchdog reset. The watchdog counter is also cleared by a reset from an external pin or
software signal, but in these cases the watchdog function does not stop.
s Other
The watchdog counter may be cleared by writing to the WTE bit, but is also cleared by a reset signal,
transition to sleep mode or stop mode, or by a hold acknowledge signal.
Timebase
Watchdog
WTE write
Watchdog start
Watchdog clear
Watchdog reset generation
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