3.5 Low Power Consumption Modes
223
Figure 3.5.1 shows the configuration of the low-power consumption mode control register and clock select
register.
s LPMCR (Low-power consumption mode control register)
s CKSCR (Clock select register)
Fig. 3.5.1 LPMCR/CKSCR Registers
[CAUTION]
Access to the Low-power Consumption Mode Control Register
Only the instructions listed in Table 3.5.2 should be used for transition to low-power consumption
modes (stop mode, sleep mode), which is accomplished by writing to the low power consumption mode
control register (LPMCR). Use of any instructions other than those listed in Table 3.5.2 for transition to
low-power consumption modes may cause abnormal operation. When the LPMCR register is used to
control any functions other than transition to low power consumption modes, any instructions may be
used.
When writing to the LPMCR register using word-length instructions, be sure to write to even-numbered
addresses. Attempting transition to low-power consumption modes by writing to odd-numbered
addresses may cause abnormal operation.
Table 3.5.2 Instructions Used for Transition to Low Power Consumption Modes
MOV
io,#imm8
MOV
dir,#imm8
MOV
eam,#imm8
MOV
eam,Ri
MOV
io,A
MOV
dir,A
MOV
addr16,A
MOV
eam,A
MOV
@RLi+disp8,A
MOVP
addr24,A
MOVW
io,#imm16
MOVW
dir,#imm16
MOVW
eam,#imm16
MOVW
eam,RWi
MOVW
io,A
MOVW
dir,A
MOVW
addr16,A
MOVW
eam,A
MOVW
@RLi+disp8,A
MOVPW
addr24,A
SETB
io:bp
SETB
dir:bp
SETB
addr16:bp
STP
SLP
SPL RST Reserved CG1
CG0 Reserved
Bit no.
Read/write
(W)
(W) (R/W)
(W)
(–)
(R/W) (R/W)
(–)
Initial value
(0)
(1)
(0)
Address : 0000A0H
7
6
5
4
3
2
1
0
LPMCR
Reserved
MCM WS1 WS0 Reserved MCS
CS1
CS0
Bit no.
Read/write
(–)
(R)
(R/W) (R/W)
(–)
(R/W) (R/W) (R/W)
Initial value
(1)
(0)
Address : 0000A1H
15
14
13
12
11
10
9
8
CKSCR