
2.4 Multi-Function Timer
90
Chapter 2: Hardware
[Bits 15 to 8] DTC7 to DTC0: Dead-time compare register
This bits form a register that holds the compare value for the dead-time counter.
The compare value determines a common non-overlapping time for three dead-time timers.
Non-overlapping time is the product of the value in this register and the selected clock source. Note
however that a setting value of 0000B is not permitted.
Only in the case that the clock source is set for ‘1 machine cycle’ (DCS1,0=00B), values of 0001B
and higher in this register will alter the above calculation to (setting + 1) times the clock source.
Therefore it is not possible to set a value of 1 × 1 machine cycle only.
(14) Port Data Register and Port Data Buffer Register (PDR6, PDBR)
Note:
Access by read-modify type commands may cause abnormal operation and should not be
attempted with this register.
The PDBR register functions as the buffer for the PDR6 register.
Bits corresponding to general-purpose port functions as selected by the COER register operate as
normal I/O ports. In this case values written to the PDBR register are simultaneously transferred to the
PDR6 register.
For bits selected as PWM output pins in the COER register, values written to address 000006B will be
written to the PDBR register only, and transfer of these values to the PDR6 register is controlled by the
OCTR register.
Fig. 2.4.3 Port Area Block Diagram
Initial value
R
7
6
5
4
3
2
1
0
-XXXXXXXB
R
bit
–
RD66 RD65 RD64 RD63 RD62 RD61 RD60
PDR6
Initial value
W
7
6
5
4
3
2
1
0
-XXXXXXXB
W
bit
–
RD66 RD65 RD64 RD63 RD62 RD61 RD60
PDBR
Address : 000006H
In
te
rn
a
l
b
u
s
Transfer control
Set/reset
To pin
WRITE
READ
PDBR
PDR6
COER
OCTR