4.2 Instruction Set
252
Chapter 4: Instructions
Table 4.2.20 Other Control Instructions (Byte/Word/Long-Word) (36 Instructions)
*1:
PCB, ADB, SSB, USB, and SPB: .. 1 cycle
DTB, DPR: ..................................... 2 cycles
*2:
7 + 3 × (pop count) + 2 × (last register number to be popped), 7 when RLST = 0
*3:
29 + 3 × (pop count) - 3 × (last register number to be popped), 8 when RLST = 0
*4:
Pop count x (c), or push count x (c)
*5:
Pop count, or push count
Note:
For an explanation of “(a)” to “(d)”, see Table 4.2.3 and Table 4.2.4.
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
PUSHW
A
PUSHW
AH
PUSHW
PS
PUSHW
rlst
POPW
A
POPW
AH
POPW
PS
POPW
rlst
JCTX
@a
AND
CCR,#imm8
OR
CCR,#imm8
MOV
RP,#imm8
MOV
ILM,#imm8
MOVEA
RWi,ear
MOVEA
RWi,eam
MOVEA
A,ear
MOVEA
A,eam
ADDSP
#imm8
ADDSP
#imm16
MOV
A,brgl
MOV
brg2,A
NOP
ADB
DTB
PCB
SPB
NCC
CMR
1
2
1
2
1
2
2+
2
2+
2
3
2
1
4
*3
3
4
*2
14
3
2
3
2+(a)
1
1+(a)
3
*1
1
0
+&
0
+&
0
1
0
(c)
*4
(c)
*4
6x(c)
0
word (SP)
← (SP) -2, ((SP)) ← (A)
word (SP)
← (SP) -2, ((SP)) ← (AH)
word (SP)
← (SP) -2, ((SP)) ← (PS)
(SP)
← (SP) - 2n, ((SP)) ← (rlst)
word (A)
← ((SP)), (SP) ← (SP) + 2
word (AH)
← ((SP)), (SP) ← (SP) + 2
word (PS)
← ((SP)), (SP) ← (SP) + 2
(rlst)
← ((SP)), (SP) ← (SP)
Context switching instruction
byte (CCR)
← (CCR) and imm8
byte (CCR)
← (CCR) or imm8
byte (RP)
← imm8
byte (ILM)
← imm8
word (RWi)
← ear
word (RWi)
← eam
word (A)
← ear
word (A)
← eam
word (SP)
← ext(imm8)
word (SP)
← imm16
byte (A)
← (brg1)
byte (brg2)
← (A)
No operation
Prefix code for AD space access
Prefix code for DT space access
Prefix code for PC space access
Prefix code for SP space access
Prefix code for flag unchange setting
Prefix for common register banks
-
Z
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-
*
-