
2.6 10-Bit 8-Input Channel A/D Converter (with 8-bit Resolution Mode)
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2.6.3 Detailed Register Descriptions
(1) ADCS1, ADCS0 (Control Status Registers)
s Register Configuration
s Register Description
These registers provide control and status indicators for the A/D converter. The ADCS0 register data
should not be overwritten while the A/D converter is operating.
Note:
Access by read-modify type instructions may cause abnormal operation and should not be
attempted with this register.
s Bit Descriptions
[Bit 15] BUSY (Busy flag and stop)
Read
: This bit indicates that the A/D converter is operating. It is set when A/D conversion starts,
and cleared when conversion ends.
Write : Writing ‘0’ to this bit will forcibly stop conversion. This is used to forcibly stop conversion
in continuous and stop conversion modes.
Writing ‘1’ to this bit has no effect on operation. In single conversion mode, this bit is cleared when
A/D conversion ends. In continuous and stop mode, this bit is not cleared until conversion is stopped
by writing ‘0.’ This bit is initialized to ‘0’ at a reset.
[CAUTION]
Do not execute a forced stop and software start (BUSY=0, STRT=1) simultaneously.
[Bit 14] INT (Interrupt)
This bit indicates data display bit. This bit is enabled when the conversion data is stored in ADCR.
When this bit is set with the bit 5 (INTE) being 1, the interrupt request takes place. I2OS is activated
if it is enabled. Writing 1 to this bit is meaningless. Clearing this bit is triggered by writing 0 to the
CPU and the I2OS transfer. This bit is initialized to 0 at reset.
[CAUTION]
Clearing this bit by writing 0 to the CPU should be done during halt of A/D
conversion.
BUSY INT
INTE PAUS STS1 STS0 STRT Reserved
Bit no.
Read/write
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (W)
(–)
Initial value
(0)
Control status register - high
Address : 00002DH
15
14
13
12
11
10
9
8
ADCS1
MD1
MD0 ANS2 ANS1 ANS0 ANE2 ANE1 ANE0
Bit no.
Read/write
(R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (R/W)
Initial value
(0)
Control status register - low
Address : 00002CH
7
6
5
4
3
2
1
0
ADCS0