參數(shù)資料
型號(hào)： MB86976PF-G
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： PLASTIC, QFP-144
文件頁(yè)數(shù)： 46/46頁(yè)
文件大小： 212K
代理商： MB86976PF-G
MB86976
Fujitsu Microelectronics, Inc.
9
Advanced 11/5/98
System Pins
Test Pins (not used in normal operation)
Pin Name
Pin No.
Type
Description
SYSCLK
116
I
System Clock: Main system clock, 40MHz.
RESET
110
I(pu)
Reset Input: Active low. Complete system reset, including the MAC.
Pin Name
Pin No.
Type
Description
TCK
118
I
JTAG Test Clock. Tie LOW if not in use.
TMS
124
I(pu)
JTAG Test Mode. Tie LOW in normal operation.
JTRST
125
I(pu)
JTAG Asynchronous Reset: Active low. Tie HIGH if not in use.
TDI
123
I(pu)
JTAG Test Data In. Tie LOW if not in use.
TDO
133
O
JTAG Test Data Out
MACTESTMODE
122
I(pu)
MAC Test Clock Select: Tie HIGH for normal operation.
SRAMCLK
119
I(pu)
RAMScan Mode Clock: Tie HIGH for normal operation.
SRAMMODE
131
I(pu)
RAMScan Mode Enable: Tie HIGH for normal operation.
SCANTESTMODE
121
I(pu)
Scan Mode Enable: Tie HIGH for normal operation.
NANDTREEOUT
39
O
Parametric NAND Tree Out: For Fujitsu Testing.
DISABLEBIDIS
120
I(pu)
Bidirectional Disable: Tie HIGH for normal operation. Forces CPD and DQ Buses into
Input Mode.
IDDTEST
144
I
Chip Testing Enable: For Fujitsu testing. Leave floating for normal operation.
MACTESTCLK
46
I(pu)
MAC Test Clock: MUST BE TIED HIGH for normal operation.
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