
MB86976
Fujitsu Microelectronics, Inc.
7
Advanced 11/5/98
Note:
VDD3: Internal VDD, 3.3V
VDD5: I/O VDD, 5.0V
GND: GROUND
(PU): INTERNAL pull-up resistor, 50K
Reserved: do NOT connect
PIN DESCRIPTIONS
LAN Interface
WAN Interface
121
SCANTESTMODE
I(pu)
129
CPUSEL[1]
I(pu)
137
VDD3
-
122
MACTESTMODE
I(pu)
130
BYTEWORD
I(pu)
138
GND
-
123
TDI
I(pu)
131
SRAMMODE
I(pu)
139
LEDLX
O
124
TMS
I(pu)
132
GND
-
140
LEDLL
O
125
JTRST
I(pu)
133
TDO
O
141
LEDWR
O
126
VDD5
-
134
LEDCX
O
142
VDD5
-
127
GND
-
135
LEDER
O
143
LEDWX
O
128
CPUSEL[0]
I(pu)
136
LEDLR
O
144
IDDTEST
I(pu)
Pin
No.
Pin Name
Type
Pin
No.
Pin Name
Type
Pin
No.
Pin Name
Type
Pin Name
Pin No.
Type
Description
TXEN
99
O
LAN Transceiver Enable: Active low signal. Enables data transmission.
LTXC
97
I
LAN Transmit Clock: 10 MHz transmit clock.
LTXD
100
O
LAN Transmit Data: Transmit data from MB86976 to the ethernet transceiver.
LRXD
92
I
LAN Receive Data: MB86976 receives data from the ethernet transceiver.
LRXC
96
I
LAN Receive Clock: 10 MHz receive clock, synchronous with the receive data on LRXD.
CRS
89
I
LAN Carrier Sense: Notifies MB86976 of activity on the network.
COL
94
I
Collision Detect: Notifies MB86976 of a collision detected on the network.
LINK
93
I
Link: Indicates link up status to MB86976. Polarity depends on transceiver.
Pin Name
Pin No.
Type
Description
WRXD
106
I
WAN Receive Data: Incoming serial data is sampled on the rising edge of WRXC.
WRXC
113
I
WAN Receive Clock: This is a free running clock, not burst.
WRXE
107
I
WAN Receive Enable: Asserted when valid data is ready for reception.
WTXD
101
O
WAN Transmit Data: Data will be asserted on the negative edge of WTXC, and the transceiver
should recover data on the positive edge of WTXC.
WTXC
114
I
WAN Transmit Clock: This is a free running clock.
WTXE
108
I
WAN Transmit Enable: The MB86976 latches the enable on a positive edge of WTXC, and
transmits valid data on the following negative edge of WTXC for transmission.