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參數(shù)資料
| 型號(hào)： | MB86976PF-G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | PLASTIC, QFP-144 |
| 文件頁數(shù)： | 29/46頁 |
| 文件大?。?/td> | 212K |
| 代理商： | MB86976PF-G |
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MB86976
Fujitsu Microelectronics, Inc.
35
Advanced 11/5/98
WAN_TxControl (WAN Transmit Control. Register 72)
The way in which a frame is transmitted on the WAN transmit interface, is determined by the bits in this register.
When the WAN is disabled due to bit 4 deasserted above, the WAN port TXD will emit a continuous sequence of logic ‘ones’ (i.e. the idle
pattern).
WAN_RxControl (WAN Receive Control. Register 74)
The way in which a frame is received on the WAN receive interface, is determined by the bits in this register.
WAN_TxStatus (WAN Transmit Status. Register 76)
WAN_TxStatus is a read-only register. It will retain its value until the completion of the next transmission event, at which point it will be
updated with the new status information
Bit
Symbol
Type
Description
0
Dis_WAN_Tx_FCS
RW0
Disable the WAN Frame Check Sequence (FCS): When asserted, disables the WAN Frame
Check Sequence.
1
Dis_Zero_Bit_Ins
RW0
Disable Zero Bit Insertion: When asserted, disables the insertion of a zero bit after 5 consecutive
one’s have been transmitted on the WAN transmit interface.
3:2
WAN_Tx_Mode
RW00
Transmit mode. 00 - Compressed HDLC, 01 - HDLC, 10 - PPP, 11 - PPP-LEX.
4
WAN_Tx_ENable
RW0
WAN Transmit Enable: When asserted, enables transmission on the WAN interface.
7:5
0
N
Reserved: Unassigned.
Bit
Symbol
Type
Description
0
Dis_WAN_Rx_FCS
RW0
Disable the WAN Frame Check Sequence (FCS) verification
1
Dis_Zero_Bit_Del
RW0
Disables the removal of a zero bit after 5 consecutive one’s have been received on the WAN
receive port.
3:2
WAN_Rx_Mode
RW00
Reception mode. 00 - Compressed HDLC, 01 - HDLC, 10 - PPP, 11 - PPP-LEX.
4
WAN_Rx_ENable
RW0
WAN Receive Enable: When asserted, enables reception on the WAN interface.
7:5
0
N
Reserved: Unassigned.
Bit
Symbol
Type
Description
1:0
Tx_Mode
R00
Packet type (0 - compressed HDLC, 1 - HDCL, 2 - PPP, 3 - PPP-LEX).
7:2
0
N
Reserved: Unassigned.
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