參數(shù)資料
型號(hào)： M80C286
廠商： Intel Corp.
英文描述： High Performance CHMOS Microprocessor With Memory Management And Protection(帶存儲(chǔ)管理和保護(hù)高性能16位CHMOS微處理器)
中文描述： 高性能CHMOS微處理器存儲(chǔ)器管理和保護(hù)（帶存儲(chǔ)管理和保護(hù)高性能16位CHMOS微處理器）
文件頁(yè)數(shù)： 48/60頁(yè)
文件大?。?/td> 957K
代理商： M80C286
M80C286
WAVEFORMS
(Continued)
M80C286 ASYNCHRONOUS
INPUT SIGNAL TIMING
271103–45
NOTES:
1. PCLK indicates which processor cycle phase will oc-
cur on the next CLK. PCLK may not indicate the cor-
rect phase until the first bus cycle is performed.
2. These inputs are asynchronous. The setup and hold
times shown assure recognition for testing purposes.
M80C286 RESET INPUT TIMING AND
SUBSEQUENT PROCESSOR CYCLE PHASE
271103–46
NOTE:
1. When RESET meets the setup time shown, the next
CLK will start or repeat
w
2 of a processor cycle.
EXITING AND ENTERING HOLD
271103–47
NOTES:
1. These signals may not be driven by the M80C286 during the time shown. The worst case in terms of latest float time
is shown.
2. The data bus will be driven as shown if the last cycle before T
I
in the diagram was a write T
C
.
3. The M80C286 floats its status pins during T
H
. External 20 K
X
resistors keep these signals high (see Table 16).
4. For HOLD request set up to HLDA, refer to Figure 29.
5. BHE and LOCK are driven at this time but will not become valid until T
S
.
6. The data bus will remain in 3-state OFF if a read cycle is performed.
48
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M80C287 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION
M80C31BH 制造商:ROCHESTER 制造商全稱(chēng):ROCHESTER 功能描述:CMOS SINGLE - CHIP 8-BIT MICROCOMPUTER 64K program Memory Space
M80C31F 制造商:OK International 功能描述:
M80C31FV-1 制造商:OKI Semiconductor 功能描述:8-BIT, 16 MHZ, MICROCONTROLLER, PQFP44
M80C39H 制造商:OK International 功能描述:Electronic Component
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