參數(shù)資料
型號(hào): M80C286
廠商: Intel Corp.
英文描述: High Performance CHMOS Microprocessor With Memory Management And Protection(帶存儲(chǔ)管理和保護(hù)高性能16位CHMOS微處理器)
中文描述: 高性能CHMOS微處理器存儲(chǔ)器管理和保護(hù)(帶存儲(chǔ)管理和保護(hù)高性能16位CHMOS微處理器)
文件頁數(shù): 10/60頁
文件大?。?/td> 957K
代理商: M80C286
M80C286
Halt
The HLT instruction stops program execution and
prevents the CPU from using the local bus until re-
started. Either NMI, INTR with IF
e
1, or RESET will
force the M80C286 out of halt. If interrupted, the
saved CS:IP will point to the next instruction after
the HLT.
M8086 REAL ADDRESS MODE
The M80C286 executes a fully upward-compatible
superset of the M8086 instruction set in real address
mode. In real address mode the M80C286 is object
code compatible with M8086 and M8088 software.
The real address mode architecture (registers and
addressing modes) is exactly as described in the
M80C286 Base Architecture section of this Func-
tional Description.
Memory Size
Physical memory is a contiguous array of up to
1,048,576 bytes (one megabyte) addressed by pins
A
0
through A
19
and BHE. A
20
through A
23
should be
ignored.
Memory Addressing
In real address mode physical memory is a contigu-
ous array of up to 1,048,576 bytes (one megabyte)
addressed by pins A
0
through A
19
and BHE. Ad-
dress bits A
20
–A
23
may not always be zero in real
mode. A
20
–A
23
should not be used by the system
while the M80C286 is operating in Real Mode.
The selector portion of a pointer is interpreted as the
upper 16 bits of a 20-bit segment address. The lower
four bits of the 20-bit segment address are always
zero. Segment addresses, therefore, begin on multi-
ples of 16 bytes. See Figure 7 for a graphic repre-
sentation of address information.
All segments in real address mode are 64K bytes in
size and may be read, written, or executed. An ex-
ception or interrupt can occur if data operands or
instructions attempt to wrap around the end of a
segment (e.g. a word with its low order byte at offset
FFFF(H) and its high order byte at offset 0000(H). If,
in real address mode, the information contained in a
segment does not use the full 64K bytes, the unused
end of the segment may be overlayed by another
segment to reduce physical memory requirements.
Reserved Memory Locations
The M80C286 reserves two fixed areas of memory
in real address mode (see Figure 8); system initiali-
zation area and interrupt table area. Locations from
addresses FFFF0(H) through FFFFF(H) are re-
served for system initialization. Initial execution be-
gins at location FFFF0(H). Locations 00000(H)
through 003FF(H) are reserved for interrupt vectors.
271103–6
Figure 7. M8086 Real Address Mode
Address Calculation
271103–7
Figure 8. M8086 Real Address Mode Initially
Reserved Memory Locations
10
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