
M80C286
ABSOLUTE MAXIMUM RATINGS
*
Case Temperature under Biasààà
b
55
§
C to
a
125
§
C
Storage Temperature ààààààààààà
b
65
§
C to
a
150
§
C
Voltage on Any Pin with
Respect to Groundàààààààààààààà
b
1.0V to
a
7V
Power Dissipationàààààààààààààààààààààààààà1.1W
NOTICE: This data sheet contains information on
products in the sampling and initial production phases
of development. The specifications are subject to
change without notice. Verify with your local Intel
Sales office that you have the latest data sheet be-
fore finalizing a design.
*
WARNING: Stressing the device beyond the ‘‘Absolute
Maximum Ratings’’ may cause permanent damage.
These are stress ratings only. Operation beyond the
‘‘Operating Conditions’’ is not recommended and ex-
tended exposure beyond the ‘‘Operating Conditions’’
may affect device reliability.
Operating Conditions
Symbol
Description
Min
b
55
Max
a
125
Units
§
C
V
T
C
V
CC
Case Temperature (Instant On)
Digital Supply Voltage
4.50
5.50
D.C. CHARACTERISTICS
Over Specified Operating Conditions
Symbol
Parameter
Min
Max
Unit
Comments
I
CC
I
CCS
C
CLK
C
IN
C
O
V
IL
V
IH
V
ILC
V
IHC
V
OL
V
OH
Supply Current
200
mA
C
L
e
100 pF (Note 6)
(Note 7)
FREQ
e
1 MHz
FREQ
e
1 MHz
FREQ
e
1 MHz
FREQ
e
2 MHz
FREQ
e
2 MHz
FREQ
e
2 MHz
FREQ
e
2 MHz
I
OL
e
2.0 mA, FREQ
e
2 MHz
I
OH
e b
2.0 mA, FREQ
e
2 MHz
I
OH
e b
100
m
A, FREQ
e
2 MHz
V
IN
e
GND or V
CC
(Note 6)
V
O
e
GND or V
CC
(Note 1)
V
IN
e
0V (Note 1)
Supply Current (Static)
5
mA
CLK Input Capacitance
20
pF
Other Input Capacitance
10
pF
Input/Output Capacitance
20
pF
Input LOW Voltage
b
0.5
0.8
V
Input HIGH Voltage
2.0
b
0.5
V
CC
a
0.5
0.8
V
CC
a
0.5
0.45
V
CLK Input LOW Voltage
V
CLK Input HIGH Voltage
3.8
V
Output LOW Voltage
V
Output HIGH Voltage
3.0
V
V
V
CC
b
0.5
I
LI
I
LO
I
IL
Input Leakage Current
g
10
m
A
Output Leakage Current
g
10
b
500
m
A
Input Sustaining Current on
BUSY
Y
and ERROR
Y
Pins
b
30
m
A
I
BHL
Input Sustaining Current
(Bus Hold LOW)
35
200
m
A
V
IN
e
1.0V (Notes 1, 2)
I
BHH
Input Sustaining Current
(Bus Hold HIGH)
b
50
b
400
m
A
V
IN
e
3.0V (Notes 1, 3)
I
BHLO
I
BHHO
Bus Hold LOW Overdrive
250
b
420
m
A
(Notes 1, 4)
Bus Hold HIGH Overdrive
m
A
(Notes 1, 5)
NOTES:
1. Tested with the clock stopped.
2. I
BHL
should be measured after lowering V
IN
to GND and then raising to 1.0V on the following pins: 36–51, 66, 67.
3. I
BHH
should be measured after raising V
IN
to V
CC
and then lowering to 3.0V on the following pins: 4–6, 36–51, 66–68.
4. An external driver must source at least I
BHLO
to switch this node from LOW to HIGH.
5. An external driver must sink at least I
BHHO
to switch this node from HIGH to LOW.
6. Tested with outputs unloaded and at maximum frequency.
7. Tested while clock stopped in phase 2 and inputs at V
CC
or V
SS
with the outputs unloaded.
41