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參數(shù)資料
| 型號： | M80C286 |
| 廠商： | Intel Corp. |
| 英文描述： | High Performance CHMOS Microprocessor With Memory Management And Protection(帶存儲管理和保護(hù)高性能16位CHMOS微處理器) |
| 中文描述： | 高性能CHMOS微處理器存儲器管理和保護(hù)（帶存儲管理和保護(hù)高性能16位CHMOS微處理器） |
| 文件頁數(shù)： | 39/60頁 |
| 文件大?。?/td> | 957K |
| 代理商： | M80C286 |
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M80C286
Table 18. Pin Description
(Continued)
Symbol
Type
Name and Function
NMI
I
NON-MASKABLE INTERRUPT REQUEST
interrupts the M80C286 with an
internally supplied vector value of 2. No interrupt acknowledge cycles are
performed. The interrupt enable bit in the M80C286 flag word does not affect
this input. The NMI input is active HIGH, may be asynchronous to the system
clock, and is edge triggered after internal synchronization. For proper
recognition, the input must have been previously LOW for at least four system
clock cycles and remain HIGH for at least four system clock cycles.
PEREQ
PEACK
I
PROCESSOR EXTENSION OPERAND REQUEST AND ACKNOWLEDGE
extend the memory management and protection capabilities of the M80C286
to processor extensions. The PEREQ input requests the M80C286 to perform
a data operand transfer for a processor extension. The PEACK output signals
the processor extension when the requested operand is being transferred.
PEREQ is active HIGH and floats to 3-state OFF
*
during bus hold
acknowledge. PEACK may be asynchronous to the system clock. PEACK is
active LOW.
O
BUSY
ERROR
I
I
PROCESSOR EXTENSION BUSY AND ERROR
indicate the operating
condition of a processor extension to the M80C286. An active BUSY input
stops M80C286 program execution on WAIT and some ESC instructions until
BUSY becomes inactive (HIGH). The M80C286 may be interrupted while
waiting for BUSY to become inactive. An active ERROR input causes the
M80C286 to perform a processor extension interrupt when executing WAIT or
some ESC instructions. These inputs are active LOW and may be
asynchronous to the system clock. These inputs have internal pull-up
resistors.
RESET
I
SYSTEM RESET
clears the internal logic of the M80C286 and is active HIGH.
The M80C286 may be reinitialized at any time with a LOW to HIGH transition
on RESET which remains active for more than 16 system clock cycles. During
RESET active, the output pins of the M80C286 enter the state shown below:
M80C286 Pin State During Reset
Pin Value
Pin Names
1 (HIGH)
0 (LOW)
3-state OFF
*
S0, S1, PEACK, A23–A0, BHE, LOCK
M/IO, COD/INTA, HLDA (Note 1)
D
15
–D
0
Operation of the M80C286 begins after a HIGH to LOW transition on RESET.
The HIGH to LOW transition of RESET must be synchronous to the system
clock. Approximately 38 CLK cycles from the trailing edge of RESET are
required by the M80C286 for internal initialization before the first bus cycle, to
fetch code from the power-on execution address, occurs.
A LOW to HIGH transition of RESET synchronous to the system clock will
end a processor cycle at the second HIGH to LOW transition of the system
clock. The LOW to HIGH transition of RESET may be asynchronous to the
system clock; however, in this case it cannot be predetermined which phase
of the processor clock will occur during the next system clock period.
Synchronous LOW to HIGH transitions of RESET are required only for
systems where the processor clock must be phase synchronous to another
clock.
V
SS
V
CC
CAP
I
SYSTEM GROUND:
0 Volts.
SYSTEM POWER:
a
5 Volt Power Supply.
SUBSTRATE FILTER CAPACITOR:
a 0.047
m
F
g
20% 12V capacitor can
be connected between this pin and ground for compatibility with the HMOS
M80286. For systems using only an M80C286, this pin can be left floating.
I
I
*
See bus hold circuitry section.
NOTE:
1. HLDA is only Low if HOLD is inactive (Low).
39
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M80C287 | 80-Bit CHMOS III Numeric Processor Exetension(80位CHMOS III數(shù)字處理器擴(kuò)展) |
| M80C51FB | CHMOS Single-Chip 8-Bit Microcontroller(CHMOS單芯片8位微控制器) |
| M80C86 | CHMOS 16-Bit Microcontroller(16位CHMOS 微處理器) |
| M80C86-20 | CHMOS 16-Bit Microcontroller(16位CHMOS 微處理器) |
| M80C86-2 | 16-BIT CHMOS MICROPROCESSOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M80C287 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION |
| M80C31BH | 制造商:ROCHESTER 制造商全稱:ROCHESTER 功能描述:CMOS SINGLE - CHIP 8-BIT MICROCOMPUTER 64K program Memory Space |
| M80C31F | 制造商:OK International 功能描述: |
| M80C31FV-1 | 制造商:OKI Semiconductor 功能描述:8-BIT, 16 MHZ, MICROCONTROLLER, PQFP44 |
| M80C39H | 制造商:OK International 功能描述:Electronic Component |
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