參數(shù)資料
型號(hào): M80C286
廠商: Intel Corp.
英文描述: High Performance CHMOS Microprocessor With Memory Management And Protection(帶存儲(chǔ)管理和保護(hù)高性能16位CHMOS微處理器)
中文描述: 高性能CHMOS微處理器存儲(chǔ)器管理和保護(hù)(帶存儲(chǔ)管理和保護(hù)高性能16位CHMOS微處理器)
文件頁(yè)數(shù): 28/60頁(yè)
文件大?。?/td> 957K
代理商: M80C286
M80C286
In real address mode, the prefetcher may fetch up to
6 bytes beyond the last control transfer or HLT in-
struction in a code segment.
In protected mode, the prefetcher will never cause a
segment overrun exception. The prefetcher stops at
the last physical memory word of the code segment.
Exception 13 will occur if the program attempts to
execute beyond the last full instruction in the code
segment.
If the last byte of a code segment appears on an
even physical memory address, the prefetcher will
read the next physical byte of memory (perform a
word code fetch). The value of this byte is ignored
and any attempt to execute it causes exception 13.
271103–27
NOTES:
1. Status lines are not driven by M80C286, yet remain high due to internal pullup resistors during HOLD state. See
section on bus hold circuitry.
2. Address, M/IO and COD/INTA may start floating during any T
C
depending on when internal M80C286 bus arbiter
decides to release bus to external HOLD. The float starts in
w
2 of T
C
. See section on bus hold circuitry.
3. BHE and LOCK may start floating after the end of any T
C
depending on when internal M80C286 bus arbiter decides
to release bus to external HOLD. The float starts in
w
1 of T
C
. See section on bus hold circuitry.
4. The minimum HOLD to HLDA time is shown. Maximum is one T
H
longer.
5. The earliest HOLD time is shown. It will always allow a subsequent memory cycle if pending is shown.
6. The minimum HOLD to HLDA time is shown. Maximum is a function of the instruction, type of bus cycle and other
machine state (i.e., Interrupts, Waits, Lock, etc.).
7. Asynchronous ready allows termination of the cycle. Synchronous ready does not signal ready in this example. Syn-
chronous ready state is ignored after ready is signaled via the asynchronous input.
Figure 29. MULTIBUS Write Terminated by Asynchronous Ready with Bus Hold
28
相關(guān)PDF資料
PDF描述
M80C287 80-Bit CHMOS III Numeric Processor Exetension(80位CHMOS III數(shù)字處理器擴(kuò)展)
M80C51FB CHMOS Single-Chip 8-Bit Microcontroller(CHMOS單芯片8位微控制器)
M80C86 CHMOS 16-Bit Microcontroller(16位CHMOS 微處理器)
M80C86-20 CHMOS 16-Bit Microcontroller(16位CHMOS 微處理器)
M80C86-2 16-BIT CHMOS MICROPROCESSOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M80C287 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION
M80C31BH 制造商:ROCHESTER 制造商全稱:ROCHESTER 功能描述:CMOS SINGLE - CHIP 8-BIT MICROCOMPUTER 64K program Memory Space
M80C31F 制造商:OK International 功能描述:
M80C31FV-1 制造商:OKI Semiconductor 功能描述:8-BIT, 16 MHZ, MICROCONTROLLER, PQFP44
M80C39H 制造商:OK International 功能描述:Electronic Component