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參數(shù)資料
| 型號： | M44C588 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4 MHz, MICROCONTROLLER |
| 文件頁數(shù)： | 8/44頁 |
| 文件大小： | 549K |
| 代理商： | M44C588 |
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M44C588
TELEFUNKEN Semiconductors
Rev. A1, 11-Nov-97
Preliminary Information
16 (44)
1.5.5
Clock Monitor Mode
13387
SYSCL clocks
NRST
TE
BP11
Oscillator supervisory mode
Normal operation
BP10
SUBCL clocks
Figure 16. Clock monitoring
For trimming purposes, the M44C588 can be put into a
clock monitor mode. The test input (TE) has to be forced
high, whereupon the SYSCL clock will appear on BP11
(Port 1, bit 1) and SUBCL clock on Port BP10 (Port 1,
bit 0). To put BP10 and BP11 back into normal operation,
the TE-pin has to be released again (see figure 17).
2
Peripheral Modules
2.1
Addressing Peripherals
Accessing the peripheral modules takes place via the I/O
bus (see figure 12). The IN or OUT instructions allow
direct addressing of up to 16 I/O modules. A dual register
addressing scheme has been adopted, with direct addres-
sing of the “primary register”. To address the “auxiliary
register” the access must be switched with an “auxiliary
switching module”. Thus a single IN (or OUT) to the
module address will read (or write) into the module pri-
mary register. Accessing the auxiliary register is
performed with the same instruction preceded by writing
the module address into the auxiliary switching module.
Byte wide registers are access by multiple IN (or OUT)
instructions. For more complex peripheral modules, with
a larger number of registers, extended addressing is used.
In this case a bank of up to 16 subport registers are indi-
rectly addressed with the subport address being initially
written into the auxiliary register.
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