參數(shù)資料
型號： M44C588
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 4 MHz, MICROCONTROLLER
文件頁數(shù)： 43/44頁
文件大?。?/td> 549K
代理商： M44C588
M44C588
TELEFUNKEN Semiconductors
Rev. A1, 11-Nov-97
Preliminary Information
8 (44)
1.2.4
ALU
TOS–1
CCR
RAM
TOS–2
SP
TOS–3
TOS
ALU
TOS–4
94 8977
Figure 7. ALU zero address operations
The 4-bit ALU performs all the arithmetic, logical, shift
and rotate operations with the top two elements of the ex-
pression stack (TOS and TOS-1) and returning the result
to the TOS. The ALU operations affect the carry/borrow
and branch flag in the condition code register (CCR).
1.2.5
Instruction Set
The MARC4 instruction set is optimized for the high level
programming
language
qFORTH.
Many
MARC4
instructions are qFORTH words. This enables the com-
piler to generate fast and compact program code. The
CPU has an instruction pipeline allowing the controller to
prefetch instruction from ROM at the same time as the
present instruction is being executed. The MARC4 is a
zero address machine, the instructions containing only
the operation to be performed and no source or destination
address fields. The operations are implicitly performed
on the data placed on the stack. There are one and two
byte instructions which are executed within 1 to 4
machine cycles. A MARC4 machine cycle is made up of
two system clock (SYSCL) cycles. Most of the instruc-
tions are only one byte long and are executed in a single
machine cycle. For more information see section
“MARC4 instruction set overview”.
1.2.6
I/O Bus
The I/O ports and the registers of the peripheral modules
(Timer 0, Timer 1, Watch timer, Watchdog etc.) are I/O
mapped. All communication between the core and the on-
chip peripherals takes place via the I/O bus and the
associated I/O control. With the MARC4 IN and OUT
instructions the I/O bus allows a direct read or write
access to one of the 16 primary I/O addresses. More about
the I/O access to the on-chip peripherals is described in
the section “Peripheral Modules”. The I/O bus is internal
and is not accessible by the customer on the final micro-
controller device, but it is used as the interface for the
MARC4 emulation (see also the section “Emulation”).
1.3
Interrupt Structure
The MARC4 can handle interrupts with eight different
priority levels. They can be generated from the internal
and external interrupt sources or by a software interrupt
from the CPU itself. Each interrupt level has a hard-wired
priority and an associated vector for the service routine in
the ROM (see table 2). The programmer can postpone the
processing of interrupts by resetting the interrupt enable
flag (I) in the CCR. An interrupt occurrence will still be
registered but the interrupt routine only started after the
I flag is set. All interrupts can be masked, and the priority
individually software configured by programming the
appropriate control register of the interrupting module
(see section “Peripheral Modules”).
相關PDF資料
PDF描述
M44C892 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
M48T08Y-15PC1 0 TIMER(S), REAL TIME CLOCK, PDMA28
M48T08Y-10PC1 0 TIMER(S), REAL TIME CLOCK, PDMA28
M48T128Y-70PM1 0 TIMER(S), REAL TIME CLOCK, PDIP32
M48T128Y-85PM1 0 TIMER(S), REAL TIME CLOCK, PDIP32
相關代理商/技術參數(shù)
參數(shù)描述
M44C890 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Low-Current Microcontroller for Wireless Communication
M44C890-H 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Low-Current Microcontroller for Wireless Communication
M44S05K4F1 功能描述:汽車連接器 MX44 Terminals RoHS:否 制造商:Amphenol SINE Systems 產品:Contacts 系列:ATP 位置數(shù)量: 型式:Female 安裝風格: 端接類型: 觸點電鍍:Nickel
M44T332538880MHZ 制造商:MEC 功能描述:
M44T3338880MHZ 制造商:MEC 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*