參數(shù)資料
型號: M44C588
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 4 MHz, MICROCONTROLLER
文件頁數(shù): 30/44頁
文件大?。?/td> 549K
代理商: M44C588
M44C588
TELEFUNKEN Semiconductors
Rev. A1, 11-Nov-97
Preliminary Information
36 (44)
3.2
Display Control Register
LCD Control Register (LCR)
The LCD control register receives the operation mode at the Port 2 auxiliary register to configure the LCD driver cir-
cuitry. The control register also loads the LCD configuration register and port configuration register. The LCD control
register is 4-bit wide. Only the upper 3 bits, if non-zero, are significant. If the upper 3 bits are zero the following 5 bits
define the address loaded into the address pointer, that means 8 bits must be written.
Auxiliary register address: ’2’hex
Bit 3
Bit 2
Bit 1
Bit 0
LCR
LCR2
LCR1
LCR0
ADR4
Reset value: 1111b
LCR2...LCR0 – LCD Control Register data
ADR4
– Highest address bit if set address pointer
Table 23.LCD Control Register (LCR)
Code
3 2 1 0
Function
1 1 1 1
Powersave
0 0 1 1
Load all segments
0 1 1 1
Display rotate
0 1 0 1
Display normal
1 0 0 1
Blanking
1 0 1 1
Clear/Init
1 1 0 1
c c c c
p p p p
Setup LCD/ port configuration with two control nibble –1. LCD configuration register LCFR
–2. LCD port configuration register LPCR
0 0 0 a
a a a a
Set LCD segment address pointer to binary address ‘a(chǎn)aaaa‘
LCD Frequency Configuration Register (LFCR)
The LCD configuration register is loaded with the SET LCD/PORT CONFIGURATION term (see table 23). The first
nibble following this term is loaded in the LCD frequency configuration register as described in table 24. Note, a second
nibble must follow (see table 25).
Primary register address: ’2’hex
Bit 3
Bit 2
Bit 1
Bit 0
LFCR
LPF1
LPF0
LFF
LMR
Reset value: 0000b
LPF1...LPF0
– LCD pump frequency
LFF
– LCD frame frequency
LMR
– LCD multiplex rate
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