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參數(shù)資料
| 型號： | M44C588 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4 MHz, MICROCONTROLLER |
| 文件頁數(shù)： | 11/44頁 |
| 文件大?。?/td> | 549K |
| 代理商： | M44C588 |
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M44C588
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A1, 11-Nov-97
19 (44)
Function
Write
/Read
Name
Address
C
T0ICR
W
Timer 0 interrupt source control register
D
T1ICR
W
Timer 1 interrupt source control register
E
P4ICR
W
Port 4 external interrupt control register
F
P4IOR
W
Port 4 (T0/T1) I/O control register
A
PBIPR
W
Port B – interrupt priority register
Aux.
PBICR
W
Port B – interrupt control register
B
PBDAT
W/R
Port B – data register/pin data
Aux.
PBDDR
W
Port B – data direction register
C
–
–
Reserved
D
RBR
W
Rom bank switch register
E
PRAM
W/R
256 x 4-bit peripheral RAM data access port
Aux.
PRADR
W
Peripheral RAM address pointer register (Byte)
F
ITFSR
W
Interval timer frequency select register
Aux.
ITIPR
W
Interval timer interrupt priority register
2.2
Bidirectional Ports
All bidirectional ports 0, 1, 4, 6 and B are 4-bits wide. All
these ports may be used for data input or output. All inputs
are equipped with Schmitt-trigger inputs together with a
variety of mask options for open drain, open source, full
complementary outputs as well as different kinds of
pull-up and pull-down transistors. The optional pull-up/
pull-down transistors are only active when the port is in
input mode. All Port Data Registers (PxDAT) are I/O
mapped to the primary address register of the respective
port address and the Port Data Direction Register
(PxDDR) to the corresponding auxiliary register.
Port Data Register (PxDAT)
Primary register address: ’Port address’hex
Bit 3*
Bit 2
Bit 1
Bit 0
PxDAT
PxDAT3
PxDAT2
PxDAT1
PxDAT0
Reset value: 1111b
* Bit 3
→ MSB, bit 0 → LSB
Port Data Direction Register (PxDDR)
Auxiliary register address: ’Port address’hex
Bit 3
Bit 2
Bit 1
Bit 0
PxDDR
PxDDR3
PxDDR2
PxDDR1
PxDDR0
Reset value: 1111b
Value: 1111b means all pins in input mode
Table 7. Port Data Direction Register (PxDDR)
Code
3 2 1 0
Function
x x x 1
BPx0 input mode
x x x 0
BPx0 output mode
x x 1 x
BPx1 input mode
x x 0 x
BPx1 output mode
x 1 x x
BPx2 input mode
x 0 x x
BPx2 output mode
1 x x x
BPx3 input mode
0 x x x
BPx3 output mode
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