參數(shù)資料
型號(hào): M44C588
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 4 MHz, MICROCONTROLLER
文件頁數(shù): 41/44頁
文件大小: 549K
代理商: M44C588
M44C588
TELEFUNKEN Semiconductors
Rev. A1, 11-Nov-97
Preliminary Information
6 (44)
RAM
FCh
00h
Autosleep
FFh
03h
04h
X
Y
SP
RP
TOS–1
Expression
stack
Return
stack
Global
variables
RAM
address
register:
07h
(256 x 4-bit)
Global
variables
4-bit
TOS
TOS–1
TOS–2
30
SP
Expression stack
Return stack
0
11
12-bit
RP
v
94 8975
Figure 5. RAM map
1.2.3
Registers
The MARC4 controller has seven programmable regis-
ters and one condition code register. They are shown in
the following programming model.
Program Counter (PC)
The program counter (PC) is a 12-bit register that contains
the address of the next instruction to be fetched from the
ROM. Instructions currently being executed are decoded
in the instruction decoder to determine the internal micro
operations. For linear code (no calls or branches) the pro-
gram counter is incremented with every instruction cycle.
If a branch-, call-, return-instruction or an interrupt is
executed the program counter is loaded with a new ad-
dress. The program counter is also used with the TABLE
instruction to fetch 8-bit wide ROM constants.
ROM Banking Register (RBR)
The ROM banking register is a 4-bit register whereby in
the M44C588 only bit 2 and bit 3 are used. These indicate
which ROM bank is presently being addressed. The RBR
is accessed with a standard peripheral read or write
instruction (IN or OUT, port address ‘D’ hex) and is fully
supported by the qFORTH compiler.
RAM Address Registers
The RAM is addressed with the four 8-bit wide RAM ad-
dress registers: SP, RP, X and Y. These registers allow
access to any of the 256 RAM nibbles.
Expression Stack Pointer (SP)
The stack pointer (SP) contains the address of the next-to-
top 4-bit item (TOS-1) of the expression stack. The
pointer is automatically pre-incremented if a nibble is
moved onto the stack or post-decremented if a nibble is
removed from the stack. Every post-decrement operation
moves the item (TOS-1) to the TOS register before the SP
is decremented. After a reset the stack pointer has to be
initialized with “ >SP S0 ” to allocate the start address of
the expression stack area.
Return Stack Pointer (RP)
The return stack pointer points to the top element of the
12-bit wide return stack. The pointer automatically pre-
increments if an element is moved onto the stack or it
post-decrements if an element is removed from the stack.
The return stack pointer increments and decrements in
steps of 4. This means that every time a 12-bit element is
stacked, a 4-bit RAM location are left unwritten. These
location are used by the qFORTH compiler to allocate
4-bit variables. After a reset the return stack pointer has
to be initialized with “>RP FCh ”.
RAM Address Register ( X and Y )
The X and Y registers are used to address any 4-bit item
in the RAM. A fetch operation moves the addressed
nibble onto the TOS. A store operation moves the TOS to
the addressed RAM location. Using either the pre-incre-
ment or post-decrement addressing mode arrays in the
RAM can be compared, filled or moved.
Top Of Stack ( TOS )
The top of stack register is the accumulator of the
MARC4. All arithmetic/logic, memory reference and I/O
operations use this register. The TOS register receives
data from the ALU, ROM, RAM or I/O bus.
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