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參數(shù)資料
| 型號： | M44C588 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4 MHz, MICROCONTROLLER |
| 文件頁數(shù)： | 26/44頁 |
| 文件大小： | 549K |
| 代理商： | M44C588 |
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M44C588
TELEFUNKEN Semiconductors
Rev. A1, 11-Nov-97
Preliminary Information
32 (44)
Port 4 I/O Control Register (P4IOR)
Subport address (write access): ’F’hex
Bit 3
Bit 2
Bit 1
Bit 0
P4IOR
P4IO3
P4IO2
P4IO1
P4IO0
Reset value: 0000b
P4IO3...P4IO0 – Port 4 I/O select
Table 17.
Port 4 I/O control register (P4IOR)
Code
3 2 1 0
Function
x x x 0
BP40 – Timer 0 clock input (T0IN0) or Timer 0 output (T0OUT0)
x x x 1
BP40 – standard port mode
x x 0 x
BP41 – Timer 0 gate input (T0IN1) or Timer 0 output (T0OUT1)
x x 1 x
BP41 – standard port mode
x 0 x x
BP42 – Timer 1 clock input (T1IN0) or Timer 1 output (T1OUT0)
x 1 x x
BP42 – standard port mode
0 x x x
BP43 – Timer 1 gate input (T1IN1) or Timer 1 output (T1OUT1)
1 x x x
BP43 – standard port mode
By using the Port 4 I/O control register (P4IOR) the program can configure the respective Port 4 pins as either standard
data I/O ports or as external signal ports for the Timer 0 and Timer 1. It should be noted that if a P4IOR bit is set low,
then the corresponding port data direction register (P4DDR) bit not longer influences the port direction. The port direc-
tion is then controlled by the corresponding Timer 0/1 mode of operation (T0MO, T1MO).
Timer/ Counter Control Register (TCCR)
Subport address (write access): ’5’hex
Bit 3
Bit 2
Bit 1
Bit 0
TCCR
T0GS
TC8
TCIO1
TCIO0
Reset value: 1111b
TCIO1, TCIO0
– Timer/ counter mode select
TC8
– Timer/ counter in 8-/ 16-bit mode
T0GS
– Timer 0 gate select
Table 18.
Timer/ counter control register (TCCR)
Code
3 2 1 0
Function
x x x 0
Non-inverted output BP41 appears on BP40 (BP40 = BP41)
x x x 1
Inverted output BP41 appears on BP40 (BP40 = NOT BP41)
x x 0 x
Non-inverted output BP43 appears on BP42 (BP42 = BP43)
x x 1 x
Inverted output BP43 appears on BP42 (BP42 = NOT BP43)
x 0 x x
16-bit mode
x 1 x x
8-bit mode
0 x x x
Timer 0 internal gated by Timer 1
1 x x x
Timer 0 external gated by Port 4
By using the Timer/ counter control register (TCCR) the program can configure the Port 4 pins. With the TCIO0/
TCIO1 bits the Port 4 can programmed as non-inverted or inverted outputs of Timer 0/ Timer 1. In 16-bit mode , Timer
0 and Timer 1 are cascaded thus forming a 16-bit counter (see figure ?? ) whereby irrespective of the state of Timer
0 interrupt mask bit (T0IM), the Timer 1 counts both Timer 0 overflow and compare interrupt events. These are gener-
ated according to the state of the Timer 0 mode register as described in the T0MO table. The comparators are also
cascaded so that when both Timer 0 and Timer 1 match their respective compare registers, the Timer 1 generates both
an output signal and a compare interrupt (if unmasked).
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