
Rev.1.02
REJ03B0179-0102
May 25, 2007
Page 5 of 124
4571 Group
PIN DESCRIPTION
MULTIFUNCTION
Note 1.Pins except above have just single function.
Note 2.The input of D
4
can be used even when CNTR0 (output) is selected.
The input/output of D
4
can be used even when CNTR0 (input) is selected.
Be careful when using inputs of both CNTR0 and D
4
since the input threshold value of CNTR0 pin is different from that of port D
4
.
Note 3.“H” output function of port C can be used even when the CNTR1 (output) is used.
Note 4.The input/output of P2
0
can be used even when INT0 is used.
Be careful when using inputs of both INT0 and P2
0
since the input threshold value of INT0 pin is different from that of port P2
0
.
Note 5.The input/output of P2
1
can be used even when INT1 is used.
Be careful when using inputs of both INT1 and P2
1
since the input threshold value of INT1 pin is different from that of port P2
1
.
Table 3
Pin description
Pin
Name
Input/Output
I/O
Function
V
DD
V
SS
RESET
Power source
Power source
Reset I/O
Connected to a plus power supply.
Connected to a 0 V power supply.
An N-channel open-drain I/O pin for a system reset. When the SRST instruction,
watchdog timer, or the built-in power-on reset causes the system to be reset, the
RESET
pin outputs “L” level.
I/O pins of the main clock generating circuit. Connect a ceramic resonator between pins
X
IN
and X
OUT
. A feedback resistor is built-in between them.
X
IN
X
OUT
D
0
D
4
Main clock input
Main clock output
I/O port D
(Input is examined
by skip decision.)
Input
Output
I/O
Each pin of port D has an independent 1-bit wide I/O function.
The output structure of ports D
0–
D
3
can be switched to N-channel open-drain or CMOS
by software.
For input use, set the latch of the specified bit to “1” and select the N-channel open-drain.
Port D
4
is also used as CNTR0 pin.
Port P0 serves as a 4-bit I/O port. The output structure is N-channel open-drain.
Port P0 has a key-on wakeup function and a pull-up function.
Both functions can be switched by software.
Port P1 serves as a 4-bit I/O port. The output structure is N-channel open-drain.
Port P1 has a key-on wakeup function and a pull-up function.
Both functions can be switched by software.
Port P2 serves as a 2-bit I/O port. The output structure is N-channel open-drain.
For input use, set the latch of the specified bit to “1”.
Ports P2
0
and P2
1
are also used as INT0 pin and INT1 pin, respectively.
Port P3 serves as a 2-bit I/O port.
The output structure can be switched to N-channel open-drain or CMOS by software.
For input use, set the latch of the specified bit to “1”.
Port C serves as a 1-bit output port.
The output structure is CMOS. Port C is also used as CNTR1.
Port K serves as a 1-bit input port.
It has the key-on wakeup function which can be switched by software.
When port K is used for the input of key matrix, connect a pull-up resistor to it externally.
CNTR0 pin has the function to input the clock for the timer 1 event counter, and to
output the timer 1 or timer 2 underflow signal divided by 2.
CNTR1 pin has the function to output the PWM signal generated by timer 3.
CNTR0 pin and CNTR1 pin are also used as Ports D
4
and C, respectively.
INT0 pin and INT1 pin accept external interrupts.
They have the key-on wakeup function which can be switched by software.
INT0 pin and INT1 pin are also used as Ports P2
0
and P2
1
, respectively.
P0
0
P0
3
I/O port P0
I/O
P1
0
P1
3
I/O port P1
I/O
P2
0
,
P2
1
I/O port P2
I/O
P3
0
,
P3
1
I/O port P3
I/O
C
Output port C
Output
K
Input port K
Input
CNTR0,
CNTR1
Timer I/O
I/O
INT0, INT1 Interrupt input
Input
Table 4
Pin description
Pin
Multifunction
CNTR1
CNTR0
Pin
Multifunction
INT0
INT1
Pin
Multifunction
C
D
4
Pin
Multifunction
P2
0
P2
1
C
D
4
P2
0
P2
1
CNTR1
CNTR0
INT0
INT1