參數(shù)資料
型號(hào)： M34571G4
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述： 單芯片4位微機(jī)的CMOS
文件頁數(shù)： 22/126頁
文件大?。?/td> 1627K
代理商： M34571G4
Rev.1.02
REJ03B0179-0102
May 25, 2007
Page 22 of 124
4571 Group
(1) External 0 interrupt request flag (EXF0)
External 0 interrupt request flag (EXF0) is set to “1” when a
valid waveform is input to P2
0
/INT0 pin.
The valid waveforms causing the interrupt must be retained at
their level for 4 clock cycles or more of the system clock (Refer
to Figure 22).
The state of EXF0 flag can be examined with the skip instruction
(SNZ0). Use the interrupt control register V1 to select the
interrupt or the skip instruction. The EXF0 flag is cleared to “0”
when an interrupt occurs or when the next instruction is skipped
with the skip instruction.
External 0 interrupt activated condition
External 0 interrupt activated condition is satisfied when a
valid waveform is input to P2
0
/INT0 pin.
The valid waveform can be selected from rising waveform,
falling waveform or both rising and falling waveforms. An
example of how to use the external 0 interrupt is as follows.
(1) Set the bit 3 of register I1 to “1” for the INT0 pin to be in the
input enabled state.
(2) Select the valid waveform with the bits 1 and 2 of register
I1.
(3) Clear the EXF0 flag to “0” with the SNZ0 instruction.
(4) Set the NOP instruction for the case when a skip is
performed with the SNZ0 instruction.
(5) Set both the external 0 interrupt enable bit (V1
0
) and the
INTE flag to “1.”
The external 0 interrupt is now enabled. Now when a valid
waveform is input to the P2
0
/INT0 pin, the EXF0 flag is set to
“1” and the external 0 interrupt occurs.
(2) External 1 interrupt request flag (EXF1)
External 1 interrupt request flag (EXF1) is set to “1” when a
valid waveform is input to P2
1
/INT1 pin.
The valid waveforms causing the interrupt must be retained at
their level for 4 clock cycles or more of the system clock (Refer
to Figure 22).
The state of EXF1 flag can be examined with the skip instruction
(SNZ1). Use the interrupt control register V1 to select the
interrupt or the skip instruction. The EXF1 flag is cleared to “0”
when an interrupt occurs or when the next instruction is skipped
with the skip instruction.
External 1 interrupt activated condition
External 1 interrupt activated condition is satisfied when a
valid waveform is input to P2
1
/INT1 pin.
The valid waveform can be selected from rising waveform,
falling waveform or both rising and falling waveforms. An
example of how to use the external 1 interrupt is as follows.
(1) Set the bit 3 of register I2 to “1” for the INT1 pin to be in the
input enabled state.
(2) Select the valid waveform with the bits 1 and 2 of register
I2.
(3) Clear the EXF1 flag to “0” with the SNZ1 instruction.
(4) Set the NOP instruction for the case when a skip is
performed with the SNZ1 instruction.
(5) Set both the external 1 interrupt enable bit (V1
1
) and the
INTE flag to “1.”
The external 1 interrupt is now enabled. Now when a valid
waveform is input to the P2
1
/INT1 pin, the EXF1 flag is set to
“1” and the external 1 interrupt occurs.
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