參數(shù)資料
型號： M34571G4
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述： 單芯片4位微機的CMOS
文件頁數(shù)： 112/126頁
文件大?。?/td> 1627K
代理商： M34571G4
Rev.1.02
REJ03B0179-0102
May 25, 2007
Page 112 of 124
4571 Group
Skip condition
C
Detailed description
Transfers the high-order 4 bits of prescaler to register B.
Transfers the low-order 4 bits of prescaler to register A.
Transfers the contents of register B to the high-order 4 bits of prescaler and prescaler reload register RPS.
Transfers the contents of register A to the low-order 4 bits of prescaler and prescaler reload register RPS.
Transfers the high-order 4 bits (T1
7
T1
4
) of timer 1 to register B.
Transfers the low-order 4 bits (T1
3
T1
0
) of timer 1 to register A.
Transfers the contents of register B to the high-order 4 bits of timer 1 and timer 1 reload register R1L.
Transfers the contents of register A to the low-order 4 bits of timer 1 and timer 1 reload register R1L.
Transfers the contents of register B to the high-order 4 bits (R1
7
R1
4
) of reload register R1, and the contents
of register A to the low-order 4 bits (R1
3
R1
0
) of reload register R1.
Transfers the high-order 4 bits (T2
7
T2
4
) of timer 2 to register B.
Transfers the low-order 4 bits (T2
3
T2
0
) of timer 2 to register A.
Transfers the contents of register B to the high-order 4 bits of timer 2 and timer 2 reload register R2L.
Transfers the contents of register A to the low-order 4 bits of timer 2 and timer 2 reload register R2L.
Transfers the high-order 4 bits (T3
7
T3
4
) of timer 3 to register B.
Transfers the low-order 4 bits (T3
3
T3
0
) of timer 3 to register A.
Transfers the contents of register B to the high-order 4 bits of timer 3 and timer 3 reload register R3L.
Transfers the contents of register A to the low-order 4 bits of timer 3 and timer 3 reload register R3L.
Transfers the contents of register B to the high-order 4 bits of timer 3 reload register R3H.
Transfers the contents of register A to the low-order 4 bits of timer 3 reload register R3H.
Transfers the contents of timer 3 reload register R3L to timer 3.
V1
2
= 0 : (T1F) = 1
When V1
2
= 0 : Clears (0) to the T1F flag and skips the next instruction when timer 1 interrupt request flag
T1F is “1”. When the T1F flag is “0”, executes the next instruction.
When V1
2
= 1 : This instruction is equivalent to the NOP instruction.
(V1
2
: bit 2 of interrupt control register V1)
V1
3
= 0 : (T2F) = 1
When V1
3
= 0 : Clears (0) to the T2F flag and skips the next instruction when timer 2 interrupt request flag
T2F is “1”. When the T2F flag is “0”, executes the next instruction.
When V1
3
= 1 : This instruction is equivalent to the NOP instruction.
(V1
3
: bit 3 of interrupt control register V1)
V2
0
= 0 : (T3F) = 1
When V2
0
= 0 : Clears (0) to the T3F flag and skips the next instruction when timer 3 interrupt request flag
T3F is “1”. When the T3F flag is “0”, executes the next instruction.
When V2
0
= 1 : This instruction is equivalent to the NOP instruction.
(V2
0
: bit 0 of interrupt control register V2)
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