參數(shù)資料
型號： M30L0R8000B0ZAQE
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
封裝： 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88
文件頁數(shù)： 62/83頁
文件大小： 1569K
代理商： M30L0R8000B0ZAQE
Obsolete
Product(s)
Product(s)
65/83
M30L0R8000T0, M30L0R8000B0
Table 42. Burst Read Information
Table 43. Bank and Erase Block Region Information
Note: 1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank Regions. There are two Bank Regions, see Tables 30, 31, 32, 33, 34 and 35 in APPENDIX A.
Offset
Data
Description
Value
(P+1D)h = 127h
0004h
Page-mode read capability
bits 0-7 ’n’ such that 2n HEX value represents the number of read-page
bytes. See offset 0028h for device word width to
determine page-mode data output width.
16 Bytes
(P+1E)h = 128h
0004h
Number of synchronous mode read configuration fields that follow.
4
(P+1F)h = 129h
0001h
Synchronous mode read capability configuration 1
bit 3-7 Reserved
bit 0-2 ’n’ such that 2n+1 HEX value represents the maximum number of
continuous synchronous reads when the device is configured
for its maximum word width. A value of 07h indicates that the
device is capable of continuous linear bursts that will output
data until the internal burst counter reaches the end of the
device’s burstable address space. This field’s 3-bit value can
be written directly to the read configuration register bit 0-2 if
the device is configured for its maximum word width. See
offset 0028h for word width to determine the burst data output
width.
4
(P+20)h = 12Ah
0002h
Synchronous mode read capability configuration 2
8
(P-21)h = 12Bh
(P+22)h = 12Ch
0003h
0007h
Synchronous mode read capability configuration 3
16
Synchronous mode read capability configuration 4
Cont.
Flash memory (top)
Flash memory (bottom)
Description
Offset
Data
Offset
Data
(P+23)h = 12Dh
02h
(P+23)h = 12Dh
02h
Number of Bank Regions within the device
相關(guān)PDF資料
PDF描述
M30L0T8000B0ZAQE 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88
M31002AMLJ1000.000000MHZ VCXO, CLOCK, 1000 MHz, LVDS OUTPUT
M31016AUMJ1000.000000MHZ VCXO, CLOCK, 1000 MHz, CMOS OUTPUT
M31002AGMJ1000.000000MHZ VCXO, CLOCK, 1000 MHz, CMOS OUTPUT
M31002BMMJ1000.000000MHZ VCXO, CLOCK, 1000 MHz, CMOS OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M30L0R8000B0ZAQF 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000B0ZAQT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQ 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
M30L0R8000T0ZAQE 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory
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