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參數(shù)資料
| 型號： | M30L0R8000B0ZAQE |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88 |
| 封裝： | 8 X 10 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-88 |
| 文件頁數(shù)： | 57/83頁 |
| 文件大?。?/td> | 1569K |
| 代理商： | M30L0R8000B0ZAQE |
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Obsolete
Product(s)
- Obsolete
Product(s)
M30L0R8000T0, M30L0R8000B0
60/83
APPENDIX B. COMMON FLASH INTERFACE
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
vice, enabling the software to upgrade itself when
necessary.
When the Read CFI Query Command is issued
the device enters CFI Query mode and the data
dresses used to retrieve the data. The Query data
is always presented on the lowest order data out-
puts (DQ0-DQ7), the other outputs (DQ8-DQ15)
are set to 0.
The CFI data structure also contains a security
area where a 64 bit unique security number is writ-
Map). This area can be accessed only in Read
mode by the final user. It is impossible to change
the security number after it has been written by
ST. Issue a Read Array command to return to
Read mode.
Table 36. Query Structure Overview
Note: The Flash memory display the CFI data structure when CFI Query command is issued. In this table are listed the main sub-sections
detailed in Tables 37, 38, 39 and 40. Query data is always presented on the lowest order data outputs.
Table 37. CFI Query Identification String
Offset
Sub-section Name
Description
000h
Reserved
Reserved for algorithm-specific information
010h
CFI Query Identification String
Command set ID and algorithm data offset
01Bh
System Interface Information
Device timing & voltage information
027h
Device Geometry Definition
Flash device layout
P
Primary Algorithm-specific Extended Query table
Additional information specific to the Primary
Algorithm (optional)
A
Alternate Algorithm-specific Extended Query table
Additional information specific to the Alternate
Algorithm (optional)
080h
Security Code Area
Lock Protection Register
Unique device Number and
User Programmable OTP
Offset
Sub-section Name
Description
Value
000h
0020h
Manufacturer Code
ST
001h
880Dh
880Eh
Device Code
Top
Bottom
002h
Reserved
003h-00Fh
Reserved
010h
0051h
Query Unique ASCII String "QRY"
"Q"
011h
0052h
"R"
012h
0059h
"Y"
013h
0001h
Primary Algorithm Command Set and Control Interface ID code 16 bit
ID code defining a specific algorithm
014h
0000h
015h
offset = P = 000Ah
Address for Primary Algorithm extended Query table (see Table 40.)P = 10Ah
016h
0001h
017h
0000h
Alternate Vendor Command Set and Control Interface ID Code
second vendor - specified algorithm supported
NA
018h
0000h
019h
value = A = 0000h
Address for Alternate Algorithm extended Query table
NA
01Ah
0000h
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PDF描述 |
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| M30L0T8000B0ZAQE | 16M X 16 FLASH 1.8V PROM, 85 ns, PBGA88 |
| M31002AMLJ1000.000000MHZ | VCXO, CLOCK, 1000 MHz, LVDS OUTPUT |
| M31016AUMJ1000.000000MHZ | VCXO, CLOCK, 1000 MHz, CMOS OUTPUT |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M30L0R8000B0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000B0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0ZAQ | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
| M30L0R8000T0ZAQE | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 Mbit (16Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Flash Memory |
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