參數(shù)資料
型號： HMS77C2001
英文描述： [General Purpose(2) : ADC/ LED/ SCI/ PWM]
中文描述： [通用（2）：藝術(shù)發(fā)展局/發(fā)光/工商/脈寬調(diào)制]
文件頁數(shù)： 52/59頁
文件大?。?/td> 660K
代理商： HMS77C2001
HMS77C2000/2001
Nov. 2002 Ver 1.1
49
ing edge of the clock.
Commands that have data associated with them (read and
load) are specified to have a minimum delay of 1us be-
tween the command and the data. After this delay the clock
pin is cycled 16 times with the first cycle being a start bit
and the last cycle being a stop bit. Data is also input and
output LSB first. Therefore, during a read operation the
LSB will be transmitted onto pin UP0 on the rising edge
of the second cycle, and during a load operation the LSB
will be latched on the falling edge of the second cycle. A
minimum 1us delay is also specified between consecutive
commands.
All commands are transmitted LSB first. Data words are
also transmitted LSB first. The data is transmitted on the
rising edge and latched on the falling edge of the clock. To
allow for decoding of commands and reversal of data pin
configuration, a time separation of at least 1us is required
between a command and a data word (or another com-
mand).
- Load Data
After receiving this command, the chip will load
in a 14-bit “data word” when 16 cycles are ap-
plied, as described previously. Because this is a
12bit core, the two MSB’s of the data are ig-
nored.
A timing diagram for the load data command is
shown in Figure 13-4.
- Read Data
After receiving this command, the chip will trans-
mit data bits out of the memory currently access-
ed starting with the second rising edge of the
clock input. The UP0 pin will go into output mode
on the second rising clock edge, and it will revert
back to input mode (hi-impedance) after the 16th
rising edge.
Because this is a 12 bit core, the two MSB’s of
the data are unused and read as ‘0’. A timing di-
agram of this command is shown in Figure 13-5.
- Increment Address
The PC is incremented when this command is
received. A timing diagram of this command is
shown in Figure 13-6.
- Begin Programming
A load data command must be given before ev-
ery begin programming command.
Programming of the appropriate memory (test
program memory or user program memory) will
begin after this command is received and decod-
ed. Programming should be performed with a se-
ries of 100us programming pulses.
A programming pulse is defined as the time be-
tween the begin programming command and the
End programming command.
- End Programming
As soon as receiving end programming com-
mand, the chip stops programming the memory
(configuration program memory or user program
memory) that it was programming at the time.
13.3 CONFIGURATION WORD
The HMS77C2000 and HMS77C2001 devices have sever-
al configuration bits. These bits can be programmed (reads
‘0’) or left unprogrammed (reads ‘1’) to select various de-
vice configurations.
Command
Mapping
(MSB ... LSB)
Data
Load data
0 0 0 0 1 0
0, data(14),0
Read data
0 0 0 1 0 0
0, data(14),0
Increment address
0 0 0 1 1 0
Begin programming
0 0 1 0 0 0
End programming
0 0 1 1 1 0
TABLE 13-1 COMMAND MAPPING
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