參數(shù)資料
型號: DSP1628
英文描述: TVS 400W 60V BIDIRECT SMA
中文描述: 澄清,串行I /設備的DSP1620/27/28/29 O控制注冊說明
文件頁數(shù): 93/114頁
文件大?。?/td> 804K
代理商: DSP1628
Preliminary Data Sheet
February 1997
DSP1628 Digital Signal Processor
91
Lucent Technologies Inc.
10 Timing Characteristics for 2.7 V Operation
(continued)
10.5 Interrupt
* CKO is free-running.
IACK assertion is guaranteed to be enclosed by VEC[3:0] assertion.
Figure 15. Interrupt Timing Diagram
Table 73. Timing Requirements for Interrupt
Note:
Interrupt is asserted during an interruptible instruction and no other pending interrupts.
Table 74. Timing Characteristics for Interrupt
Note:
Interrupt is asserted during an interruptible instruction and no other pending interrupts.
Abbreviated Reference
t21
t22
Parameter
Min
19
2T
Max
Unit
ns
ns
Interrupt Setup (high to low)
INT Assertion Time (high to low)
Abbreviated Reference
t23
t24
t25
t26
Parameter
Min
Max
T/2 + 10
12.5
10
12.5
Unit
ns
ns
ns
ns
IACK Assertion Time (low to high)
VEC Assertion Time (low to high)
IACK Invalid Time (low to low)
VEC Invalid Time (low to low)
CKO*
t21
V
OH
V
OL
V
IH
V
IL
t22
IACK
V
OH
V
OL
VEC[3:0]
V
OH
V
OL
t23
t24
t25
t26
5-4018 (C).
INT[1:0]
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