- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377000 > DSP1628 TVS 400W 60V BIDIRECT SMA PDF資料下載
參數(shù)資料
| 型號(hào)： | DSP1628 |
| 英文描述： | TVS 400W 60V BIDIRECT SMA |
| 中文描述： | 澄清，串行I /設(shè)備的DSP1620/27/28/29 O控制注冊(cè)說(shuō)明 |
| 文件頁(yè)數(shù)： | 90/114頁(yè) |
| 文件大?。?/td> | 804K |
| 代理商： | DSP1628 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)當(dāng)前第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)
Preliminary Data Sheet
February 1997
DSP1628 Digital Signal Processor
Lucent Technologies Inc.
88
10 Timing Characteristics for 2.7 V Operation
(continued)
10.2 Reset Circuit
The DSP1628 has two external reset pins: RSTB and TRST. At initial powerup, or if the supply voltage falls below
V
DD
MIN* and a device reset is required, both TRST and RSTB must be asserted to initialize the device. Figure 12
shows two separate events:
1. Chip reset at initial powerup.
2. Chip reset following a drop in power supply.
Note:
The TRST pin must be asserted even if the JTAG controller is not used by the application.
* See Table 60, Recommended Operating Conditions.
* When both INT0 and RSTB are asserted, all output and bidirectional pins (except TDO, which 3-states by JTAG control) are put in a
3-state condition. With RSTB asserted and INT0 not asserted, EROM, ERAMHI, ERAMLO, IO, and RWN outputs remain high, and CKO
remains a free-running clock.
See Table 62 for input clock electrical requirements.
Figure 12. Powerup Reset and Chip Reset Timing Diagram
Note:
The device needs to be clocked for at least six CKI cycles during reset after powerup. Otherwise,
high currents may flow.
Table 68. Timing Requirements for Powerup Reset and Chip Reset
Abbreviated Reference
t8
t9
Parameter
Min
6T
—
2T
20
—
Max
—
10
—
—
54
Unit
ns
ms
ns
μ
s
ns
RSTB and TRST Reset Pulse (low to high)
V
DD
Ramp
V
DD
MIN to RSTB Low
t146
CMOS
Small-signal
t153
RSTB (low to high)
Table 69. Timing Characteristics for Powerup Reset and Chip Reset
Abbreviated Reference
t10
t11
Parameter
Min
—
—
Max
100
100
Unit
ns
ns
RSTB Disable Time (low to 3-state)
RSTB Enable Time (high to valid)
V
DD
RAMP
RSTB,
TRST
OUTPUT
PINS *
CKI
t11
V
OH
V
OL
V
IH
V
IL
t9
t146
t10
0.4 V
V
DD
MIN
t11
V
DD
MIN
0.4 V
t10
t9
t146
t153
t8
t153
t8
5-4010 (C).a
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DSP16210 | TVS 400W 6.5V UNIDIRECT SMA |
| DSP1627 | TVS 400W 6.5V BIDIRECT SMA |
| DSP1629 | TVS 400W 64V UNIDIRECT SMA |
| DSP16410C | TVS 400W 7.0V UNIDIRECT SMA |
| DSP16410 | 16-bit fixed point DSP with Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP1629 | 制造商:AGERE 制造商全稱:AGERE 功能描述:DSP1629 Digital Signal Processor |
| DSP1629BA10K10IT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|16-BIT|CMOS|BGA|144PIN|PLASTIC |
| DSP1629BA10K12.5IR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| DSP1629BA10K16.7IT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|16-BIT|CMOS|BGA|144PIN|PLASTIC |
| DSP1629BA10K19.2IR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。