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參數(shù)資料
| 型號(hào)： | DSP1628 |
| 英文描述： | TVS 400W 60V BIDIRECT SMA |
| 中文描述： | 澄清，串行I /設(shè)備的DSP1620/27/28/29 O控制注冊(cè)說明 |
| 文件頁數(shù)： | 56/114頁 |
| 文件大?。?/td> | 804K |
| 代理商： | DSP1628 |
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Preliminary Data Sheet
February 1997
DSP1628 Digital Signal Processor
54
Lucent Technologies Inc.
5 Software Architecture
(continued)
Data Move Instructions
Data move instructions normally execute in two instruction cycles. (If PC or
rM
point to external memory, any pro-
grammed wait-states must be added. In addition, if PC and
rM
point to the same bank of DPRAM, then one cycle
must be added.) Immediate data move instructions require two words of program memory; all other data move in-
structions require only one word. The only exception to these statements is a special case immediate load (short
immediate) instruction. If a YAAU register is loaded with a 9-bit short immediate value, the instruction requires only
one word of memory and executes in one instruction cycle. All data move instructions, except those doing long im-
mediate loads, can be executed from within the cache. The data move instructions are as follows:
R = IM16
aT[l] = R
SR = IM9
Y = R
R = Y
Z : R
R = aS[l]
DR = *(OFFSET)
*(OFFSET) = DR
Notes:
sioc
,
sioc2
,
tdms
,
tdms2
,
srta
, and
srta2
registers are not readable.
When signed registers less than 16 bits wide (
c0
,
c1
,
c2
) are read, their contents are sign-extended to 16 bits. When unsigned registers less
than 16 bits wide are read, their contents are zero-extended to 16 bits.
Loading an accumulator with a data move instruction does not affect the flags.
Table 25. Replacement Table for Data Move Instructions
Replace
R
DR
Value
Meaning
—
Any of the registers in Table 55
r<0—3>, a0[l], a1[l], y[l], p, pl, x,
pt, pr, psw
a0, a1
*rM, *rM++, *rM--, *rM++j
*rMzp, *rMpz, *rMm2, *rMjk
16-bit value
9-bit value
5-bit value from instruction
11-bit value in base register
Subset of registers accessible with direct addressing.
aS, aT
Y
Z
IM16
IM9
OFFSET
High half of accumulator.
Same as in multiply/ALU instructions.
Same as in multiply/ALU instructions.
Long immediate data.
Short immediate data for YAAU registers.
Value in bits [15:5] of
ybase
register form the 11 most significant
bits of the base address. The 5-bit offset is concatenated to this
to form a 16-bit address.
Subset of registers for short immediate.
SR
r<0—3>, rb, re, j, k
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