參數(shù)資料
型號(hào)： AM79C970
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
中文描述： PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線(xiàn)
文件頁(yè)數(shù)： 99/168頁(yè)
文件大?。?/td> 943K
代理商： AM79C970
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AMD
P R E L I M I N A R Y
1-966
Am79C970
15–0 NNXDAU
Contains the upper 16 bits of the
next next transmit descriptor ad-
dress pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
H_RESET,
CSR40: Current Receive Byte Count
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Reserved locations. Read and
written as ZERO.
Current Receive Byte Count.
This field is a copy of the BCNT
field of RMD1 of the current re-
ceive descriptor.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–12
RES
11–0
CRBC
H_RESET,
CSR41: Current Receive Status
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Current Receive Status. This
field is a copy of bits 31–24 of
RMD1 of the current receive
descriptor.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
Reserved locations. Read and
written as ZERO.
15–8
CRST
H_RESET,
7–0
RES
CSR42: Current Transmit Byte Count
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Reserved locations. Read and
written as ZERO.
Current Transmit Byte Count.
This field is a copy of the BCNT
field of TMD1 of the current trans-
mit descriptor.
15–12
RES
11–0
CXBC
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
H_RESET,
CSR43: Current Transmit Status
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Current Transmit Status. This
field is a copy of bits 31–24 of
TMD1 of the current transmit
descriptor.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
Reserved locations. Read and
written as ZERO.
15–8
CXST
H_RESET,
7–0
RES
CSR44: Next Receive Byte Count
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Reserved locations. Read and
written as ZERO.
Next Receive Byte Count. This
field is a copy of the BCNT field of
RMD1 of the next receive
descriptor.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–12
RES
11–0
NRBC
H_RESET,
CSR45: Next Receive Status
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Next Receive Status. This field is
a copy of bits 31–24 of RMD1 of
the next receive descriptor.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
Reserved locations. Read and
written as ZERO.
15–8
NRST
H_RESET,
7–0
RES
相關(guān)PDF資料
PDF描述
AM79C971VCW PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971 PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971KCW IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE
AM79C972BKCW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
AM79C972BKIW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970A 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC\\W 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述:
AM79C970AKC\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
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