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參數(shù)資料
| 型號(hào)： | AM79C970 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus |
| 中文描述： | PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線 |
| 文件頁數(shù)： | 55/168頁 |
| 文件大?。?/td> | 943K |
| 代理商： | AM79C970 |
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AMD
P R E L I M I N A R Y
1-922
Am79C970
Manchester Encoder/Decoder (MENDEC)
The integrated Manchester Encoder/Decoder provides
the PLS (Physical Layer Signaling) functions required
for a fully compliant ISO 8802-3 (IEEE/ANSI 802.3) sta-
tion. The MENDEC provides the encoding function for
data to be transmitted on the network using the high ac-
curacy on-board oscillator, driven by either the crystal
oscillator or an external CMOS level compatible clock.
The MENDEC also provides the decoding function from
data received from the network. The MENDEC contains
a Power On Reset (POR) circuit, which ensures that all
analog portions of the PCnet-PCI controller are forced
into their correct state during power up, and prevents er-
roneous data transmission and/or reception during
thistime.
External Crystal Characteristics
When using a crystal to drive the oscillator, the following
crystal specification may be used to ensure less than
±
0.5 ns jitter at DO
±
. See Table 4 below.
Table 4. Crystal Specification
Parameter
Min
Nom
Max
Unit
1. Parallel Resonant Frequency
20
MHz
2. Resonant Frequency Error
–50
+50
PPM
3. Change in Resonant Frequency
With Respect to Temperature (0 – 70
°
C)*
–40
+40
PPM
4. Crystal Load Capacitance
20
50
pF
5. Motional Crystal Capacitance (C1)
0.022
pF
6. Series Resistance
35
7
.
Shunt Capacitance
7
pF
8. Drive Level
TBD
mW
* Requires trimming specification; not trim is 50 PPM total.
External Clock Drive Characteristics
When driving the oscillator from a CMOS level external
clock source, XTAL2 must be left floating (uncon-
nected). Anexternal clock having the following charac-
teristics must be used to ensure less than
±
0.5 ns jitter at
DO
±
. See Table 5.
Table 5. Clock Drive Characteristics
Clock Frequency:
20 MHz
±
0.01%
Rise/Fall Time (t
R
/t
F
):
<= 6 ns from 0.5 V to V
DD
–0.5 V
XTAL1 HIGH/LOW Time (tHIGH/tLOW):
20 ns min
XTAL1 Falling Edge to Falling Edge Jitter:
<
±
0.2 ns at 2.5 V input (V
DD/2
)
MENDEC Transmit Path
The transmit section encodes separate clock and NRZ
data input signals into a standard Manchester encoded
serial bit stream. The transmit outputs (DO
±
) are de-
signed to operate into terminated transmission lines.
When operating into a 78
terminated transmission
line, the transmit signaling meets the required output
levels and skew for Cheapernet, Ethernet and
IEEE-802.3.
Transmitter Timing and Operation
A 20 MHz fundamental mode crystal oscillator provides
the basic timing reference for the MENDEC portion of
the PCnet-PCI controller. The crystal is divided by two,
to create the internal transmit clock reference. Both
clocks are fed into the MENDECs Manchester Encoder
to generate the transitions in the encoded data stream.
The internal transmit clock is used by the MENDEC to
internally synchronize the Internal Transmit Data
(ITXDAT) from the controller and Internal Transmit En-
able (ITXEN). The internal transmit clock is also used as
a stable bit rate clock by the receive section of the MEN-
DEC and controller.
The oscillator requires an external 0.01% timing refer-
ence. The accuracy requirements, if an external crystal
is used are tighter because allowance for the on-board
parasitics must be made to deliver a final accuracy of
0.01%.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C970A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
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| AM79C970AKC\\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: |
| AM79C970AKC\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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