參數(shù)資料
型號： AM79C970
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
中文描述： PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線
文件頁數(shù)： 97/168頁
文件大?。?/td> 943K
代理商： AM79C970
AMD
P R E L I M I N A R Y
1-964
Am79C970
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
H_RESET,
CSR24: Base Address of Receive Ring Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
base address of the Receive
Ring.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0
BADRL
H_RESET,
CSR25: Base Address of Receive Ring Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
base address of the Receive
Ring.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 BADRU
H_RESET,
CSR26: Next Receive Descriptor Address Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
next RDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0
NRDAL
H_RESET,
CSR27: Next Receive Descriptor Address Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
next RDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 NRDAU
H_RESET,
CSR28: Current Receive Descriptor
Address Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
current RDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0
CRDAL
H_RESET,
CSR29: Current Receive Descriptor
Address Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
current RDRE address pointer.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 CRDAU
H_RESET,
CSR30: Base Address of Transmit Ring Lower
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the lower 16 bits of the
base address of the Transmit
Ring.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0
BADXL
H_RESET,
CSR31: Base Address of Transmit Ring Upper
Bit
Name
Description
31–16
RES
Reserved locations. Written as
ZEROs and read as undefined.
Contains the upper 16 bits of the
base address of the Transmit
Ring.
Read/write accessible only when
STOP bit is set. These bits are
unaffected
by
S_RESET or STOP.
15–0 BADXU
H_RESET,
相關(guān)PDF資料
PDF描述
AM79C971VCW PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971 PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971KCW IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE
AM79C972BKCW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
AM79C972BKIW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC\\W 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述:
AM79C970AKC\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*