參數(shù)資料
型號(hào)： AM79C970
廠(chǎng)商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
中文描述： PCnetTM - PCI單芯片以太網(wǎng)控制器的PCI總線(xiàn)
文件頁(yè)數(shù)： 91/168頁(yè)
文件大?。?/td> 943K
代理商： AM79C970
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)當(dāng)前第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)
AMD
P R E L I M I N A R Y
1-958
Am79C970
the Runt Packet Accept (RPA) bit
(CSR124, bit 3) may be changed
only when ENTST is set to ONE.
To enable RPA, the user must
first write a ONE to the ENTST
bit. Next, the user must first write
a ONE to the RPA bit (CSR124,
bit 3). Finally, the user must write
a ZERO to the ENTST bit to take
the device out of test mode op-
eration. Once, the RPA bit has
been set to ONE, the device will
remain in the Runt Packet Accept
mode until the RPA bit is cleared
to ZERO.
Read/Write accessible. ENTST
is cleared by H_RESET or
S_RESET and is unaffected by
the STOP bit.
When DMAPLUS = “1”, DMA
Burst Counter in CSR80 is dis-
abled. If DMAPLUS = “0”, the
counter is enabled.
Read/Write
DMAPLUS is cleared by H_RE-
SET or S_RESET and is unaf-
fected by the STOP bit.
Timer Enable Register. If TIMER
is set, the Bus Timer Register,
CSR82 is enabled. If TIMER is
cleared, the Bus Timer Register
is disabled.
Read/Write accessible. TIMER is
cleared
by
S_RESET and is unaffected by
the STOP bit.
Disable Transmit Polling. If
DPOLL is set, the Buffer Man-
agement Unit will disable trans-
mit polling. Likewise, if DPOLL is
cleared, automatic transmit poll-
ing is enabled. If DPOLL is set,
TDMD bit in CSR0 must be set in
order to initiate a manual poll of a
transmit descriptor. Transmit de-
scriptor polling will not take place
if TXON is reset.
Read/Write accessible. DPOLL
is cleared by H_RESET or
S_RESET and is unaffected by
the STOP bit.
Auto Pad Transmit. When set,
APAD_XMT enables the auto-
matic padding feature. Transmit
frames will be padded to extend
them to 64 bytes including FCS.
The FCS is calculated for the en-
tire frame including pad, and ap-
pended after the pad field.
APAD_XMT will override the pro-
gramming of the DXMTFCS bit.
14
DMAPLUS
accessible.
13
TIMER
H_RESET
or
12
DPOLL
11
APAD_XMT
Read/Write
APAD_XMT
H_RESET or S_RESET and is
unaffected by the STOP bit.
Auto Strip Receive. When set,
ASTRP_RCV enables the auto-
matic pad stripping feature. The
pad and FCS fields will be
stripped from receive frames and
not placed in the FIFO.
Read/Write
ASTRP_RCV is cleared by
H_RESET or S_RESET and is
unaffected by the STOP bit.
Missed Frame Counter Overflow
Interrupt.
Indicates the MFC (CSR112)
wrapped around. Can be cleared
by writing a 1 to this bit. Also
cleared by H_RESET, S_RESET
or by asserting the STOP bit.
Writing a 0 has no effect.
When MFCO is set,
INTA
is as-
serted if IENA is ONE and the
mask bit MFCOM is ZERO.
When the value 01h has been
programmed into the SWSTYLE
register (BCR20, bits 7–0) for
ILACC (Am79C900) compatibil-
ity, then this bit has no meaning
and PCnet-PCI controller will
never set the value of this bit to
ONE.
Missed Frame Counter Overflow
Mask.
If MFCOM is set, MFCO will be
unable to set INTR in CSR0.
Set to a ONE by H_RESET or
S_RESET, unaffected by the
STOP bit.
When the value 01h has been
programmed into the SWSTYLE
register (BCR20, bits 7–0) for
ILACC (Am79C900) compatibil-
ity, then this bit has no meaning
and PCnet-PCI controller will set
the value of this bit to ZERO.
Reserved location. Written as
ZERO and read as ZERO.
Reserved location. This bit may
be written to as either a ONE or a
ZERO, but will always be read as
a ZERO. This bit has no effect on
PCnet-PCI controller operation.
Receive
Collision
Overflow.
Indicates the Receive Collision
Counter
(CSR114)
around. Can be cleared by
accessible.
cleared
is
by
10 ASTRP_RCV
accessible.
9
MFCO
8
MFCOM
7
RES
6
RES
5
RCVCCO
Counter
wrapped
相關(guān)PDF資料
PDF描述
AM79C971VCW PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971 PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
AM79C971KCW IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE
AM79C972BKCW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
AM79C972BKIW PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C970A 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
AM79C970AKC\\W 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述:
AM79C970AKC\W 制造商:Rochester Electronics LLC 功能描述:- Bulk
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*