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參數資料
| 型號： | AM79C970 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus |
| 中文描述： | PCnetTM - PCI單芯片以太網控制器的PCI總線 |
| 文件頁數： | 114/168頁 |
| 文件大小： | 943K |
| 代理商： | AM79C970 |
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P R E L I M I N A R Y
AMD
1-981
Am79C970
pin will be driven to a LOW level
whenever the OR of the enabled
signals is true and the LED pin
will be disabled and allowed to
float high whenever the OR of the
enabled signals is false. (i.e. the
LED output will be an Open Drain
output and the output value will
be the inverse of the LEDOUT
status bit.)
When this bit has the value ONE,
then the LED pin will be driven to
a HIGH level whenever the OR of
the enabled signals is true and
the LED pin will be driven to a
LOW level whenever the OR of
the enabled signals is false. (i.e.
the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit.)
The setting of this bit will not af-
fect the polarity of the LEDOUT
bit for this register.
LED Disable. This bit is used to
disable the LED output. When
LEDDIS has the value ONE, then
the LED output will always be
tristated. When LEDDIS has the
value ZERO, then the LED out-
put value will be governed by the
LEDOUT and LEDPOL values.
Reserved locations. Write as ZE-
ROS, read as undefined.
A value of 0 disables the signal.
A value of 1 enables the signal.
Pulse Stretcher Enable. Extends
the LED illumination time for
each new occurrence of the en-
abled function for this LED
output.
A value of 0 disables the signal.
A value of 1 enables the signal.
Link Status Enable. Indicates the
current link status on the Twisted
Pair interface. When this bit is en-
abled, a value of ONE will be
passed to the LEDOUT signal to
indicate that the link status state
is PASS. A value of ZERO will be
passed to the LEDOUT signal to
indicate that the link status state
is FAIL.
A value of 0 disables the signal.
A value of 1 enables the signal.
Receive Match status Enable. In-
dicates receive activity on the
network that has passed the ad-
dress match function for this
node. All address matching
13
LEDDIS
12–8
RES
7
PSE
6
LNKSTE
5
RCVME
modes are included: Physical,
Logical
filtering
Promiscuous.
A value of 0 disables the signal.
A value of 1 enables the signal.
Transmit status Enable. Indi-
cates
PCnet-PCI
transmit activity.
A value of 0 disables the signal.
A value of 1 enables the signal.
Receive Polarity status Enable.
Indicates the current Receive
Polarity condition on the Twisted
Pair interface. A value of ONE in-
dicates that the polarity of the
RXD
±
pair has been reversed. A
value of ZERO indicates that the
polarity of the RXD
±
pair has not
been reversed.
Receive polarity indication is
valid only if the T-MAU is in the
Link Pass state.
A value of 0 disables the signal.
A value of 1 enables the signal.
Receive status Enable. Indicates
receive activity on the network.
A value of 0 disables the signal.
A value of 1 enables the signal.
Jabber status Enable. Indicates
that the PCnet-PCI controller is
jabbering on the network.
A value of 0 disables the signal.
A value of 1 enables the signal.
COLE
Collision status Enable. Indi-
cates collision activity on the net-
work.
A value of 0 disables the signal.
A value of 1 enables the signal.
and
4
XMTE
controller
3
RXPOLE
2
RCVE
1
JABE
0
BCR16: I/O Base Address Lower
Bit
Name
Description
Note that all bits in this register
are programmable through the
EEPROM PREAD operation.
Reserved locations. Written as
ZEROs and read as undefined.
Reserved locations. After H_RE-
SET, the value of these bits will
be undefined. The settings of
these bits will have no affect on
any
PCnet-PCI
function.
IOBASEL is not affected by
S_RESET or STOP.
31–16
RES
15–5 IOBASEL
controller
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相關代理商/技術參數 |
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| AM79C970A | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
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| AM79C970AKC\\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: |
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