參數(shù)資料
型號: 16F872
廠商: Microchip Technology Inc.
英文描述: CAT 5E CROSSOVER PATCH CORD CABLE GREEN 10 FT
中文描述: 28引腳,8位閃存微控制器的CMOS
文件頁數(shù): 41/160頁
文件大小: 2600K
代理商: 16F872
1999 Microchip Technology Inc.
Preliminary
DS30221A-page 41
PIC16F872
6.0
TIMER1 MODULE
The Timer1 module is a 16-bit timer/counter consisting
of two 8-bit registers (TMR1H and TMR1L), which are
readable and writable. The TMR1 Register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh
and rolls over to 0000h. The TMR1 Interrupt, if enabled,
is generated on overflow, which is latched in interrupt
flag bit TMR1IF (PIR1<0>). This interrupt can be
enabled/disabled by setting/clearing TMR1 interrupt
enable bit TMR1IE (PIE1<0>).
Timer1 can operate in one of two modes:
As a timer
As a counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
In timer mode, Timer1 increments every instruction
cycle. In counter mode, it increments on every rising
edge of the external clock input.
Timer1 can be enabled/disabled by setting/clearing
control bit TMR1ON (T1CON<0>).
Timer1 also has an internal “reset input”. This reset can
be generated by the CCP module (Section 8.0).
Register 6-1 shows the Timer1 control register.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI and RC0/T1OSO/T1CKI pins
become inputs. That is, the TRISC<1:0> value is
ignored.
Additional information on timer modules is available in
the PICmicro Mid-range MCU Family Reference
Manual (DS33023).
REGISTER 6-1:
T1CON: TIMER1 CONTROL REGISTER
(ADDRESS 10h)
U-0
U-0
R/W-0
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7-6:
bit 5-4:
Unimplemented:
Read as '0'
T1CKPS<1:0>
: Timer1 Input Clock Prescale Select bits
11
= 1:8 Prescale value
10
= 1:4 Prescale value
01
= 1:2 Prescale value
00
= 1:1 Prescale value
T1OSCEN
: Timer1 Oscillator Enable Control bit
1
= Oscillator is enabled
0
= Oscillator is shut off (The oscillator inverter is turned off to eliminate power drain)
T1SYNC
: Timer1 External Clock Input Synchronization Control bit
TMR1CS = 1
1
= Do not synchronize external clock input
0
= Synchronize external clock input
TMR1CS = 0
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
TMR1CS
: Timer1 Clock Source Select bit
1
= External clock from pin RC0/T1OSO/T1CKI (on the rising edge)
0
= Internal clock (F
OSC
/4)
TMR1ON
: Timer1 On bit
1
= Enables Timer1
0
= Stops Timer1
bit 3:
bit 2:
bit 1:
bit 0:
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