參數(shù)資料
型號： 16F872
廠商： Microchip Technology Inc.
英文描述： CAT 5E CROSSOVER PATCH CORD CABLE GREEN 10 FT
中文描述： 28引腳，8位閃存微控制器的CMOS
文件頁數(shù)： 16/160頁
文件大小： 2600K
代理商： 16F872
PIC16F872
DS30221A-page 16
Preliminary
1999 Microchip Technology Inc.
2.2.2.5
PIR1 REGISTER
The PIR1 register contains the individual flag bits for
the peripheral interrupts.
REGISTER 2-5:
PIR1 REGISTER (ADDRESS 0Ch)
Note:
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt bits are clear prior to enabling an
interrupt.
R/W-0
—
bit7
R/W-0
ADIF
R/W-0
—
R/W-0
—
R/W-0
SSPIF
R/W-0
CCP1IF
R/W-0
TMR2IF TMR1IF
R/W-0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
read as ‘0’
- n= Value at POR reset
bit0
bit 7:
bit 6:
Reserved:
Always maintain this bit clear
ADIF
: A/D Converter Interrupt Flag bit
1
= An A/D conversion completed
0
= The A/D conversion is not complete
Reserved:
Always maintain this bit clear
SSPIF
: Synchronous Serial Port (SSP) Interrupt Flag
1
= The SSP interrupt condition has occurred, and must be cleared in software before returning from the
interrupt service routine. The conditions that will set this bit are:
SPI
A transmission/reception has taken place.
I
2
C Slave
A transmission/reception has taken place.
I
2
C Master
A transmission/reception has taken place.
The initiated start condition was completed by the SSP module.
The initiated stop condition was completed by the SSP module.
The initiated restart condition was completed by the SSP module.
The initiated acknowledge condition was completed by the SSP module.
A start condition occurred while the SSP module was idle (Multimaster system).
A stop condition occurred while the SSP module was idle (Multimaster system).
0
= No SSP interrupt condition has occurred.
CCP1IF
: CCP1 Interrupt Flag bit
Capture Mode
1
= A TMR1 register capture occurred (must be cleared in software)
0
= No TMR1 register capture occurred
Compare Mode
1
= A TMR1 register compare match occurred (must be cleared in software)
0
= No TMR1 register compare match occurred
PWM Mode
Unused in this mode
TMR2IF
: TMR2 to PR2 Match Interrupt Flag bit
1
= TMR2 to PR2 match occurred (must be cleared in software)
0
= No TMR2 to PR2 match occurred
TMR1IF
: TMR1 Overflow Interrupt Flag bit
1
= TMR1 register overflowed (must be cleared in software)
0
= TMR1 register did not overflow
bit 5-4:
bit 3:
bit 2:
bit 1:
bit 0:
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