- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368730 > 16F872 (Microchip Technology Inc.) CAT 5E CROSSOVER PATCH CORD CABLE GREEN 10 FT PDF資料下載
參數(shù)資料
| 型號(hào)： | 16F872 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | CAT 5E CROSSOVER PATCH CORD CABLE GREEN 10 FT |
| 中文描述： | 28引腳，8位閃存微控制器的CMOS |
| 文件頁數(shù)： | 25/160頁 |
| 文件大小： | 2600K |
| 代理商： | 16F872 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當(dāng)前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁
1999 Microchip Technology Inc.
Preliminary
DS30221A-page 25
PIC16F872
3.2
PORTB and the TRISB Register
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (=1) will make the corresponding PORTB pin
an input (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISB bit (=0) will
make the corresponding PORTB pin an output (i.e., put
the contents of the output latch on the selected pin).
Three pins of PORTB are multiplexed with the Low
Voltage Programming function; RB3/PGM, RB6/PGC
and RB7/PGD. The alternate functions of these pins
are described in the Special Features Section.
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (OPTION_REG<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are dis-
abled on a Power-on Reset.
FIGURE 3-3:
BLOCK DIAGRAM OF
RB<3:0> PINS
Four of PORTB’s pins, RB<7:4>, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e., any RB<7:4> pin con-
figured as an output is excluded from the interrupt on
change comparison). The input pins (of RB<7:4>) are
compared with the old value latched on the last read of
PORTB. The “mismatch” outputs of RB<7:4> are
OR’ed together to generate the RB Port Change Inter-
rupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
Any read or write of PORTB. This will end the
mismatch condition.
b)
Clear flag bit RBIF.
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition and
allow flag bit RBIF to be cleared.
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
This interrupt on mismatch feature, together with soft-
ware configurable pull-ups on these four pins, allow
easy interface to a keypad and make it possible for
wake-up on key-depression. Refer to the Embedded
Control Handbook, “Implementing Wake-Up on Key
Stroke”
(AN552).
RB0/INT is an external interrupt input pin and is config-
ured using the INTEDG bit (OPTION_REG<6>).
RB0/INT is discussed in detail in Section 11.10.1.
FIGURE 3-4:
BLOCK DIAGRAM OF
RB<7:4> PINS
Data Latch
D
RBPU
(2)
P
V
DD
Q
CK
Q
D
CK
Q
D
EN
Data Bus
WR Port
WR TRIS
RD TRIS
RD Port
weak
pull-up
RD Port
RB0/INT
RB3/PGM
I/O
pin
(1)
TTL
Input
Buffer
Schmitt Trigger
Buffer
TRIS Latch
Note 1:
I/O pins have diode protection to V
DD
and V
SS
.
To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the RBPU bit (OPTION_REG<7>).
2:
Data Latch
D
From other
RB<7:4> pins
RBPU
(2)
P
V
DD
I/O
pin
(1)
Q
CK
Q
D
CK
Q
D
EN
Q
D
EN
Data Bus
WR Port
WR TRIS
Set RBIF
TRIS Latch
RD TRIS
RD Port
weak
pull-up
RD Port
Latch
TTL
Input
Buffer
ST
Buffer
RB<7:6> in serial programming mode
Q3
Q1
Note 1:
I/O pins have diode protection to V
DD
and V
SS
.
To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the RBPU bit (OPTION_REG<7>).
2:
Note:
When using Low Voltage ICSP Programming (LVP) and the pull-ups on PORTB are enabled, bit 3 in the
TRISB register must be cleared to disable the pull-up on RB3 and ensure the proper operation of the device.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 16F876A | 28/40-pin Enhanced FLASH Microcontrollers |
| 16F876 | CAT 5E CROSSOVER, GREEN 15 FT PATCH CABLE |
| 16F877 | CAT 5E CROSSOVER PATCH CORD CABLE GREEN 20 FT |
| 16FL100S02 | 6A, 12A AND 16A FAST RECOVERY RECTIFIERS |
| 16FL100S05 | 6A, 12A AND 16A FAST RECOVERY RECTIFIERS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 16F876 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:28/40-pin 8-Bit CMOS FLASH Microcontrollers |
| 16F876A | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:28/40-pin Enhanced FLASH Microcontrollers |
| 16F877 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:28/40-pin 8-Bit CMOS FLASH Microcontrollers |
| 16F9040 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:COMPACT DIGITALMULTIMETER TRUE RMS |
| 16F9041 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:COMPACT DMM MIT RS232 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。