參數(shù)資料
型號(hào)： S29NS032JPLBFW002
廠商： Spansion Inc.
英文描述： 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
中文描述： 110納米CMOS 1.8伏只有同時(shí)讀/寫(xiě)，突發(fā)模式閃存
文件頁(yè)數(shù)： 42/85頁(yè)
文件大小： 799K
代理商： S29NS032JPLBFW002
38
S29NS-J
S29NS-J_00_A10 March 22, 2006
D a t a S h e e t
Figure 1. Program Operation
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing
two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then
followed by the chip erase command, which in turn invokes the Embedded Erase algorithm. The
device does
not
require the system to preprogram prior to erase. The Embedded Erase algorithm
automatically preprograms and verifies the entire memory for an all zero data pattern prior to
electrical erase. The system is not required to provide any controls or timings during these oper-
ations.
Table 18
shows the address and data requirements for the chip erase command sequence.
When the Embedded Erase algorithm is complete, that bank returns to the read mode and ad-
dresses are no longer latched. The system can determine the status of the erase operation by
using DQ7 or DQ6/DQ2. Refer to the
Write Operation Status
section for information on these sta-
tus bits.
Any commands written during the chip erase operation are ignored. However, note that a
hard-
w are reset
immediately terminates the erase operation. If that occurs, the chip erase command
sequence should be reinitiated once that bank has returned to reading array data, to ensure data
integrity.
Figure 2
illustrates the algorithm for the erase operation. Refer to the
Erase/Program Operations
table in the AC Characteristics section for parameters, and
Figure 16
section for timing diagrams.
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
Write Unlock Cycles:
Address XXX, Data 60
Address XXX, Data 60
Address SLA, Data 60
Note: See
Table 18
for program command sequence.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29NS032JPLBFW003 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS032JPLBJW000 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS032JPLBJW002 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS032JPLBJW003 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS064J0LBAW00 制造商:SPANSION 制造商全稱(chēng):SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
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